Commit e8dd556
LoongArch: Enable generic CPU vulnerabilites support
Currently, many architectures support generic CPU vulnerabilites, such
as x86, arm64 and riscv:
commit 61dc0f5 ("x86/cpu: Implement CPU vulnerabilites sysfs functions")
commit 61ae132 ("arm64: enable generic CPU vulnerabilites support")
commit 0e3f364 ("riscv: Enable generic CPU vulnerabilites support")
All LoongArch CPUs (since Loongson-3A5000) implement a special mechanism
in the processor core to prevent "Meltdown" and "Spectre" attacks, so it
can enable generic CPU vulnerabilites support for LoongArch too.
Without this patch, there are no user interfaces of vulnerabilities to
check on LoongArch. The output of those files reflects the state of the
CPUs in the system, the output value "Not affected" means "CPU is not
affected by the vulnerability".
Before:
# cat /sys/devices/system/cpu/vulnerabilities/spec_rstack_overflow
cat: /sys/devices/system/cpu/vulnerabilities/spec_rstack_overflow: No such file or directory
# cat /sys/devices/system/cpu/vulnerabilities/spec_store_bypass
cat: /sys/devices/system/cpu/vulnerabilities/spec_store_bypass: No such file or directory
# cat /sys/devices/system/cpu/vulnerabilities/meltdown
cat: /sys/devices/system/cpu/vulnerabilities/meltdown: No such file or directory
After:
# cat /sys/devices/system/cpu/vulnerabilities/spec_rstack_overflow
Not affected
# cat /sys/devices/system/cpu/vulnerabilities/spec_store_bypass
Not affected
# cat /sys/devices/system/cpu/vulnerabilities/meltdown
Not affected
Link: https://www.loongson.cn/EN/news/show?id=633
Signed-off-by: Tiezhu Yang <yangtiezhu@loongson.cn>
Signed-off-by: Huacai Chen <chenhuacai@loongson.cn>1 parent 0eb0bd2 commit e8dd556
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