|
| 1 | +/* SPDX-License-Identifier: GPL-2.0 OR BSD-2-Clause */ |
| 2 | +/* kvaser_pciefd common definitions and declarations |
| 3 | + * |
| 4 | + * Copyright (C) 2025 KVASER AB, Sweden. All rights reserved. |
| 5 | + */ |
| 6 | + |
| 7 | +#ifndef _KVASER_PCIEFD_H |
| 8 | +#define _KVASER_PCIEFD_H |
| 9 | + |
| 10 | +#include <linux/can/dev.h> |
| 11 | +#include <linux/completion.h> |
| 12 | +#include <linux/pci.h> |
| 13 | +#include <linux/spinlock.h> |
| 14 | +#include <linux/timer.h> |
| 15 | +#include <linux/types.h> |
| 16 | +#include <net/devlink.h> |
| 17 | + |
| 18 | +#define KVASER_PCIEFD_MAX_CAN_CHANNELS 8UL |
| 19 | +#define KVASER_PCIEFD_DMA_COUNT 2U |
| 20 | +#define KVASER_PCIEFD_DMA_SIZE (4U * 1024U) |
| 21 | +#define KVASER_PCIEFD_CAN_TX_MAX_COUNT 17U |
| 22 | + |
| 23 | +struct kvaser_pciefd; |
| 24 | + |
| 25 | +struct kvaser_pciefd_address_offset { |
| 26 | + u32 serdes; |
| 27 | + u32 pci_ien; |
| 28 | + u32 pci_irq; |
| 29 | + u32 sysid; |
| 30 | + u32 loopback; |
| 31 | + u32 kcan_srb_fifo; |
| 32 | + u32 kcan_srb; |
| 33 | + u32 kcan_ch0; |
| 34 | + u32 kcan_ch1; |
| 35 | +}; |
| 36 | + |
| 37 | +struct kvaser_pciefd_irq_mask { |
| 38 | + u32 kcan_rx0; |
| 39 | + u32 kcan_tx[KVASER_PCIEFD_MAX_CAN_CHANNELS]; |
| 40 | + u32 all; |
| 41 | +}; |
| 42 | + |
| 43 | +struct kvaser_pciefd_dev_ops { |
| 44 | + void (*kvaser_pciefd_write_dma_map)(struct kvaser_pciefd *pcie, |
| 45 | + dma_addr_t addr, int index); |
| 46 | +}; |
| 47 | + |
| 48 | +struct kvaser_pciefd_driver_data { |
| 49 | + const struct kvaser_pciefd_address_offset *address_offset; |
| 50 | + const struct kvaser_pciefd_irq_mask *irq_mask; |
| 51 | + const struct kvaser_pciefd_dev_ops *ops; |
| 52 | +}; |
| 53 | + |
| 54 | +struct kvaser_pciefd_fw_version { |
| 55 | + u8 major; |
| 56 | + u8 minor; |
| 57 | + u16 build; |
| 58 | +}; |
| 59 | + |
| 60 | +struct kvaser_pciefd_can { |
| 61 | + struct can_priv can; |
| 62 | + struct devlink_port devlink_port; |
| 63 | + struct kvaser_pciefd *kv_pcie; |
| 64 | + void __iomem *reg_base; |
| 65 | + struct can_berr_counter bec; |
| 66 | + u32 ioc; |
| 67 | + u8 cmd_seq; |
| 68 | + u8 tx_max_count; |
| 69 | + u8 tx_idx; |
| 70 | + u8 ack_idx; |
| 71 | + int err_rep_cnt; |
| 72 | + unsigned int completed_tx_pkts; |
| 73 | + unsigned int completed_tx_bytes; |
| 74 | + spinlock_t lock; /* Locks sensitive registers (e.g. MODE) */ |
| 75 | + struct timer_list bec_poll_timer; |
| 76 | + struct completion start_comp, flush_comp; |
| 77 | +}; |
| 78 | + |
| 79 | +struct kvaser_pciefd { |
| 80 | + struct pci_dev *pci; |
| 81 | + void __iomem *reg_base; |
| 82 | + struct kvaser_pciefd_can *can[KVASER_PCIEFD_MAX_CAN_CHANNELS]; |
| 83 | + const struct kvaser_pciefd_driver_data *driver_data; |
| 84 | + void *dma_data[KVASER_PCIEFD_DMA_COUNT]; |
| 85 | + u8 nr_channels; |
| 86 | + u32 bus_freq; |
| 87 | + u32 freq; |
| 88 | + u32 freq_to_ticks_div; |
| 89 | + struct kvaser_pciefd_fw_version fw_version; |
| 90 | +}; |
| 91 | + |
| 92 | +extern const struct devlink_ops kvaser_pciefd_devlink_ops; |
| 93 | + |
| 94 | +int kvaser_pciefd_devlink_port_register(struct kvaser_pciefd_can *can); |
| 95 | +void kvaser_pciefd_devlink_port_unregister(struct kvaser_pciefd_can *can); |
| 96 | +#endif /* _KVASER_PCIEFD_H */ |
0 commit comments