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drm/asahi: mmu: Change step_remap() to new api
Fixes deadlock. Also fix missing TLB inval Signed-off-by: Asahi Lina <lina@asahilina.net>
1 parent 66c6cd2 commit f386a86

1 file changed

Lines changed: 14 additions & 2 deletions

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drivers/gpu/drm/asahi/mmu.rs

Lines changed: 14 additions & 2 deletions
Original file line numberDiff line numberDiff line change
@@ -337,14 +337,14 @@ impl gpuvm::DriverGpuVm for VmInner {
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fn step_remap(
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self: &mut gpuvm::UpdatingGpuVm<'_, Self>,
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op: &mut gpuvm::OpReMap<Self>,
340+
vm_bo: &gpuvm::GpuVmBo<Self>,
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ctx: &mut Self::StepContext,
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) -> Result {
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let prev_gpuva = ctx.prev_va.take().expect("Multiple step_remap calls");
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let next_gpuva = ctx.next_va.take().expect("Multiple step_remap calls");
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let va = op.unmap().va().expect("No previous VA");
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let orig_addr = va.addr();
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let orig_range = va.range();
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let vm_bo = va.vm_bo();
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// Only unmap the hole between prev/next, if they exist
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let unmap_start = if let Some(op) = op.prev_map() {
@@ -372,6 +372,18 @@ impl gpuvm::DriverGpuVm for VmInner {
372372

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self.unmap_pages(unmap_start, UAT_PGSZ, (unmap_range >> UAT_PGBIT) as usize)?;
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375+
if let Some(asid) = self.slot() {
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mem::tlbi_range(asid as u8, unmap_start as usize, unmap_range as usize);
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mod_dev_dbg!(
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self.dev,
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"MMU: flush range: asid={:#x} start={:#x} len={:#x}\n",
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asid,
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unmap_start,
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unmap_range,
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);
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mem::sync();
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}
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if op.unmap().unmap_and_unlink_va().is_none() {
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dev_err!(self.dev.as_ref(), "step_unmap: could not unlink gpuva");
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}
@@ -1194,8 +1206,8 @@ impl Vm {
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new_va: Some(gpuvm::GpuVa::<VmInner>::new(init::default())?),
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prev_va: Some(gpuvm::GpuVa::<VmInner>::new(init::default())?),
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next_va: Some(gpuvm::GpuVa::<VmInner>::new(init::default())?),
1197-
vm_bo: None,
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prot,
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..Default::default()
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};
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let sgt = gem.sg_table()?;

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