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bala-gunasundarmiquelraynal
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mtd: rawnand: atmel: set pmecc data setup time
Setup the pmecc data setup time as 3 clock cycles for 133MHz as recommended by the datasheet. Fixes: f88fc12 ("mtd: nand: Cleanup/rework the atmel_nand driver") Reported-by: Zixun LI <admin@hifiphile.com> Closes: https://lore.kernel.org/all/c015bb20-6a57-4f63-8102-34b3d83e0f5b@microchip.com Suggested-by: Ada Couprie Diaz <ada.coupriediaz@arm.com> Signed-off-by: Balamanikandan Gunasundar <balamanikandan.gunasundar@microchip.com> Signed-off-by: Miquel Raynal <miquel.raynal@bootlin.com>
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drivers/mtd/nand/raw/atmel/pmecc.c

Lines changed: 6 additions & 0 deletions
Original file line numberDiff line numberDiff line change
@@ -143,6 +143,7 @@ struct atmel_pmecc_caps {
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int nstrengths;
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int el_offset;
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bool correct_erased_chunks;
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bool clk_ctrl;
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};
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struct atmel_pmecc {
@@ -843,6 +844,10 @@ static struct atmel_pmecc *atmel_pmecc_create(struct platform_device *pdev,
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if (IS_ERR(pmecc->regs.errloc))
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return ERR_CAST(pmecc->regs.errloc);
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/* pmecc data setup time */
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if (caps->clk_ctrl)
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writel(PMECC_CLK_133MHZ, pmecc->regs.base + ATMEL_PMECC_CLK);
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/* Disable all interrupts before registering the PMECC handler. */
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writel(0xffffffff, pmecc->regs.base + ATMEL_PMECC_IDR);
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atmel_pmecc_reset(pmecc);
@@ -896,6 +901,7 @@ static struct atmel_pmecc_caps at91sam9g45_caps = {
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.strengths = atmel_pmecc_strengths,
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.nstrengths = 5,
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.el_offset = 0x8c,
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.clk_ctrl = true,
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};
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static struct atmel_pmecc_caps sama5d4_caps = {

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