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arm64/sysreg: Improve PIR/POR helpers
We currently have one helper to set a PIRx_ELx's permission field to a given value, PIRx_ELx_PERM(), and another helper to extract a permission field from POR_ELx, POR_ELx_IDX(). The naming is pretty confusing - it isn't clear at all that "_PERM" corresponds to a setter and "_IDX" to a getter. This patch aims at improving the situation by using the same suffixes as FIELD_PREP()/FIELD_GET(), which we have already adopted for SYS_FIELD_{PREP,GET}(): * PIRx_ELx_PERM_PREP(), POR_ELx_PERM_PREP() create a register value where the permission field for a given index is set to a given value. * POR_ELx_PERM_GET() extracts the permission field from a given register value for a given index. These helpers are not implemented using FIELD_PREP()/FIELD_GET() because the mask may not be constant, and they need to be usable in assembly. They are all defined in asm/sysreg.h, as one would expect for basic sysreg-related helpers. Finally the new POR_ELx_PERM_* macros are used for existing calculations in signal.c and mmu.c. Signed-off-by: Kevin Brodsky <kevin.brodsky@arm.com> Link: https://lore.kernel.org/r/20250219164029.2309119-2-kevin.brodsky@arm.com Signed-off-by: Catalin Marinas <catalin.marinas@arm.com>
1 parent 0ad2507 commit f91a3a6

5 files changed

Lines changed: 34 additions & 29 deletions

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‎arch/arm64/include/asm/pgtable-prot.h‎

Lines changed: 18 additions & 18 deletions
Original file line numberDiff line numberDiff line change
@@ -169,25 +169,25 @@ static inline bool __pure lpa2_is_enabled(void)
169169
#define PAGE_GCS_RO __pgprot(_PAGE_GCS_RO)
170170

171171
#define PIE_E0 ( \
172-
PIRx_ELx_PERM(pte_pi_index(_PAGE_GCS), PIE_GCS) | \
173-
PIRx_ELx_PERM(pte_pi_index(_PAGE_GCS_RO), PIE_R) | \
174-
PIRx_ELx_PERM(pte_pi_index(_PAGE_EXECONLY), PIE_X_O) | \
175-
PIRx_ELx_PERM(pte_pi_index(_PAGE_READONLY_EXEC), PIE_RX_O) | \
176-
PIRx_ELx_PERM(pte_pi_index(_PAGE_SHARED_EXEC), PIE_RWX_O) | \
177-
PIRx_ELx_PERM(pte_pi_index(_PAGE_READONLY), PIE_R_O) | \
178-
PIRx_ELx_PERM(pte_pi_index(_PAGE_SHARED), PIE_RW_O))
172+
PIRx_ELx_PERM_PREP(pte_pi_index(_PAGE_GCS), PIE_GCS) | \
173+
PIRx_ELx_PERM_PREP(pte_pi_index(_PAGE_GCS_RO), PIE_R) | \
174+
PIRx_ELx_PERM_PREP(pte_pi_index(_PAGE_EXECONLY), PIE_X_O) | \
175+
PIRx_ELx_PERM_PREP(pte_pi_index(_PAGE_READONLY_EXEC), PIE_RX_O) | \
176+
PIRx_ELx_PERM_PREP(pte_pi_index(_PAGE_SHARED_EXEC), PIE_RWX_O) | \
177+
PIRx_ELx_PERM_PREP(pte_pi_index(_PAGE_READONLY), PIE_R_O) | \
178+
PIRx_ELx_PERM_PREP(pte_pi_index(_PAGE_SHARED), PIE_RW_O))
179179

180180
#define PIE_E1 ( \
181-
PIRx_ELx_PERM(pte_pi_index(_PAGE_GCS), PIE_NONE_O) | \
182-
PIRx_ELx_PERM(pte_pi_index(_PAGE_GCS_RO), PIE_NONE_O) | \
183-
PIRx_ELx_PERM(pte_pi_index(_PAGE_EXECONLY), PIE_NONE_O) | \
184-
PIRx_ELx_PERM(pte_pi_index(_PAGE_READONLY_EXEC), PIE_R) | \
185-
PIRx_ELx_PERM(pte_pi_index(_PAGE_SHARED_EXEC), PIE_RW) | \
186-
PIRx_ELx_PERM(pte_pi_index(_PAGE_READONLY), PIE_R) | \
187-
PIRx_ELx_PERM(pte_pi_index(_PAGE_SHARED), PIE_RW) | \
188-
PIRx_ELx_PERM(pte_pi_index(_PAGE_KERNEL_ROX), PIE_RX) | \
189-
PIRx_ELx_PERM(pte_pi_index(_PAGE_KERNEL_EXEC), PIE_RWX) | \
190-
PIRx_ELx_PERM(pte_pi_index(_PAGE_KERNEL_RO), PIE_R) | \
191-
PIRx_ELx_PERM(pte_pi_index(_PAGE_KERNEL), PIE_RW))
181+
PIRx_ELx_PERM_PREP(pte_pi_index(_PAGE_GCS), PIE_NONE_O) | \
182+
PIRx_ELx_PERM_PREP(pte_pi_index(_PAGE_GCS_RO), PIE_NONE_O) | \
183+
PIRx_ELx_PERM_PREP(pte_pi_index(_PAGE_EXECONLY), PIE_NONE_O) | \
184+
PIRx_ELx_PERM_PREP(pte_pi_index(_PAGE_READONLY_EXEC), PIE_R) | \
185+
PIRx_ELx_PERM_PREP(pte_pi_index(_PAGE_SHARED_EXEC), PIE_RW) | \
186+
PIRx_ELx_PERM_PREP(pte_pi_index(_PAGE_READONLY), PIE_R) | \
187+
PIRx_ELx_PERM_PREP(pte_pi_index(_PAGE_SHARED), PIE_RW) | \
188+
PIRx_ELx_PERM_PREP(pte_pi_index(_PAGE_KERNEL_ROX), PIE_RX) | \
189+
PIRx_ELx_PERM_PREP(pte_pi_index(_PAGE_KERNEL_EXEC), PIE_RWX) | \
190+
PIRx_ELx_PERM_PREP(pte_pi_index(_PAGE_KERNEL_RO), PIE_R) | \
191+
PIRx_ELx_PERM_PREP(pte_pi_index(_PAGE_KERNEL), PIE_RW))
192192

193193
#endif /* __ASM_PGTABLE_PROT_H */

‎arch/arm64/include/asm/por.h‎

Lines changed: 4 additions & 5 deletions
Original file line numberDiff line numberDiff line change
@@ -6,26 +6,25 @@
66
#ifndef _ASM_ARM64_POR_H
77
#define _ASM_ARM64_POR_H
88

9-
#define POR_BITS_PER_PKEY 4
10-
#define POR_ELx_IDX(por_elx, idx) (((por_elx) >> ((idx) * POR_BITS_PER_PKEY)) & 0xf)
9+
#include <asm/sysreg.h>
1110

1211
static inline bool por_elx_allows_read(u64 por, u8 pkey)
1312
{
14-
u8 perm = POR_ELx_IDX(por, pkey);
13+
u8 perm = POR_ELx_PERM_GET(pkey, por);
1514

1615
return perm & POE_R;
1716
}
1817

1918
static inline bool por_elx_allows_write(u64 por, u8 pkey)
2019
{
21-
u8 perm = POR_ELx_IDX(por, pkey);
20+
u8 perm = POR_ELx_PERM_GET(pkey, por);
2221

2322
return perm & POE_W;
2423
}
2524

2625
static inline bool por_elx_allows_exec(u64 por, u8 pkey)
2726
{
28-
u8 perm = POR_ELx_IDX(por, pkey);
27+
u8 perm = POR_ELx_PERM_GET(pkey, por);
2928

3029
return perm & POE_X;
3130
}

‎arch/arm64/include/asm/sysreg.h‎

Lines changed: 9 additions & 1 deletion
Original file line numberDiff line numberDiff line change
@@ -1062,8 +1062,11 @@
10621062
#define PIE_RX UL(0xa)
10631063
#define PIE_RW UL(0xc)
10641064
#define PIE_RWX UL(0xe)
1065+
#define PIE_MASK UL(0xf)
10651066

1066-
#define PIRx_ELx_PERM(idx, perm) ((perm) << ((idx) * 4))
1067+
#define PIRx_ELx_BITS_PER_IDX 4
1068+
#define PIRx_ELx_PERM_SHIFT(idx) ((idx) * PIRx_ELx_BITS_PER_IDX)
1069+
#define PIRx_ELx_PERM_PREP(idx, perm) (((perm) & PIE_MASK) << PIRx_ELx_PERM_SHIFT(idx))
10671070

10681071
/*
10691072
* Permission Overlay Extension (POE) permission encodings.
@@ -1078,6 +1081,11 @@
10781081
#define POE_RXW UL(0x7)
10791082
#define POE_MASK UL(0xf)
10801083

1084+
#define POR_ELx_BITS_PER_IDX 4
1085+
#define POR_ELx_PERM_SHIFT(idx) ((idx) * POR_ELx_BITS_PER_IDX)
1086+
#define POR_ELx_PERM_GET(idx, reg) (((reg) >> POR_ELx_PERM_SHIFT(idx)) & POE_MASK)
1087+
#define POR_ELx_PERM_PREP(idx, perm) (((perm) & POE_MASK) << POR_ELx_PERM_SHIFT(idx))
1088+
10811089
/* Initial value for Permission Overlay Extension for EL0 */
10821090
#define POR_EL0_INIT POE_RXW
10831091

‎arch/arm64/kernel/signal.c‎

Lines changed: 1 addition & 1 deletion
Original file line numberDiff line numberDiff line change
@@ -91,7 +91,7 @@ static void save_reset_user_access_state(struct user_access_state *ua_state)
9191
u64 por_enable_all = 0;
9292

9393
for (int pkey = 0; pkey < arch_max_pkey(); pkey++)
94-
por_enable_all |= POE_RXW << (pkey * POR_BITS_PER_PKEY);
94+
por_enable_all |= POR_ELx_PERM_PREP(pkey, POE_RXW);
9595

9696
ua_state->por_el0 = read_sysreg_s(SYS_POR_EL0);
9797
write_sysreg_s(por_enable_all, SYS_POR_EL0);

‎arch/arm64/mm/mmu.c‎

Lines changed: 2 additions & 4 deletions
Original file line numberDiff line numberDiff line change
@@ -1557,7 +1557,6 @@ int arch_set_user_pkey_access(struct task_struct *tsk, int pkey, unsigned long i
15571557
{
15581558
u64 new_por = POE_RXW;
15591559
u64 old_por;
1560-
u64 pkey_shift;
15611560

15621561
if (!system_supports_poe())
15631562
return -ENOSPC;
@@ -1582,12 +1581,11 @@ int arch_set_user_pkey_access(struct task_struct *tsk, int pkey, unsigned long i
15821581
new_por &= ~POE_X;
15831582

15841583
/* Shift the bits in to the correct place in POR for pkey: */
1585-
pkey_shift = pkey * POR_BITS_PER_PKEY;
1586-
new_por <<= pkey_shift;
1584+
new_por = POR_ELx_PERM_PREP(pkey, new_por);
15871585

15881586
/* Get old POR and mask off any old bits in place: */
15891587
old_por = read_sysreg_s(SYS_POR_EL0);
1590-
old_por &= ~(POE_MASK << pkey_shift);
1588+
old_por &= ~(POE_MASK << POR_ELx_PERM_SHIFT(pkey));
15911589

15921590
/* Write old part along with new part: */
15931591
write_sysreg_s(old_por | new_por, SYS_POR_EL0);

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