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pswbuild
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Synchronize code for OnePlus CPH2655_16.0.0.213(EX01)
Based on QCOM release TAG: kernel/build:AU_LINUX_KERNEL.PLATFORM.4.0.R1.00.00.00.061.111 platform/vendor/nxp/opensource/driver:AU_LINUX_ANDROID_LA.VENDOR.15.4.0.R1.11.00.00.1168.150 platform/vendor/opensource/camera-devicetree:AU_TECHPACK_CAMERA.LA.5.0.R1.00.00.00.000.066 platform/vendor/opensource/camera-kernel:AU_TECHPACK_CAMERA.LA.5.0.R1.00.00.00.000.066 platform/vendor/opensource/dataipa:AU_LINUX_ANDROID_LA.VENDOR.15.4.0.R1.11.00.00.1168.150 platform/vendor/opensource/display-devicetree:AU_TECHPACK_DISPLAY.LA.5.0.R1.00.00.00.000.061 platform/vendor/opensource/display-drivers:AU_TECHPACK_DISPLAY.LA.5.0.R1.00.00.00.000.061 platform/vendor/opensource/eva-devicetree:AU_TECHPACK_CV.LA.2.1.R1.00.00.00.000.032 platform/vendor/opensource/eva-kernel:AU_TECHPACK_CV.LA.2.1.R1.00.00.00.000.032 platform/vendor/opensource/mm-devicetree:AU_TECHPACK_DISPLAY.LA.5.0.R1.00.00.00.000.061 platform/vendor/opensource/mm-drivers:AU_TECHPACK_DISPLAY.LA.5.0.R1.00.00.00.000.061 platform/vendor/opensource/mmrm-devicetree:AU_TECHPACK_VIDEO.LA.5.0.R1.00.00.00.000.049 platform/vendor/opensource/mmrm-driver:AU_TECHPACK_VIDEO.LA.5.0.R1.00.00.00.000.049 platform/vendor/opensource/synx-kernel:AU_LINUX_ANDROID_LA.VENDOR.15.4.0.R1.11.00.00.1168.150 platform/vendor/opensource/video-devicetree:AU_TECHPACK_VIDEO.LA.5.0.R1.00.00.00.000.049 platform/vendor/opensource/video-driver:AU_TECHPACK_VIDEO.LA.5.0.R1.00.00.00.000.049 platform/vendor/proprietary/mm-devicetree:AU_TECHPACK_DISPLAY.LA.5.0.R1.00.00.00.000.061 platform/vendor/qcom-opensource/bt-devicetree:AU_TECHPACK_BTFM.LA.1.0.R1.00.00.00.000.057 platform/vendor/qcom-opensource/bt-kernel:AU_TECHPACK_BTFM.LA.1.0.R1.00.00.00.000.057 platform/vendor/qcom-opensource/data-devicetree:AU_LINUX_ANDROID_LA.VENDOR.15.4.0.R1.11.00.00.1168.150 platform/vendor/qcom-opensource/data-kernel:AU_LINUX_ANDROID_LA.VENDOR.15.4.0.R1.11.00.00.1168.150 platform/vendor/qcom-opensource/devicetree:AU_LINUX_KERNEL.PLATFORM.4.0.R1.00.00.00.061.111 platform/vendor/qcom-opensource/eSE-devicetree:AU_LINUX_ANDROID_LA.VENDOR.15.4.0.R1.11.00.00.1168.150 platform/vendor/qcom-opensource/nfc-devicetree:AU_LINUX_ANDROID_LA.VENDOR.15.4.0.R1.11.00.00.1168.150 platform/vendor/qcom-opensource/synx-devicetree:AU_LINUX_ANDROID_LA.VENDOR.15.4.0.R1.11.00.00.1168.150 platform/vendor/qcom-opensource/wlan/fw-api:AU_TECHPACK_WLAN.LA.1.0.R1.00.00.00.000.075 platform/vendor/qcom-opensource/wlan/platform:AU_TECHPACK_WLAN.LA.1.0.R1.00.00.00.000.075 platform/vendor/qcom-opensource/wlan/qca-wifi-host-cmn:AU_TECHPACK_WLAN.LA.1.0.R1.00.00.00.000.075 platform/vendor/qcom-opensource/wlan/qcacld-3.0:AU_TECHPACK_WLAN.LA.1.0.R1.00.00.00.000.075 platform/vendor/qcom-opensource/wlan/utils/sigma-dut:AU_TECHPACK_WLAN.LA.1.0.R1.00.00.00.000.075 platform/vendor/qcom-opensource/wlan/wlan-devicetree:AU_TECHPACK_WLAN.LA.1.0.R1.00.00.00.000.075 platform/vendor/qcom-proprietary/display-devicetree:AU_TECHPACK_DISPLAY.LA.5.0.R1.00.00.00.000.061 platform/vendor/qcom/opensource/audio-devicetree:AU_TECHPACK_AUDIO_HANDSET.LA.10.0.R1.00.00.00.000.061 platform/vendor/qcom/opensource/audio-kernel-ar:AU_TECHPACK_AUDIO_HANDSET.LA.10.0.R1.00.00.00.000.061 platform/vendor/qcom/opensource/datarmnet:AU_LINUX_ANDROID_LA.VENDOR.15.4.0.R1.11.00.00.1168.150 platform/vendor/qcom/opensource/datarmnet-ext:AU_LINUX_ANDROID_LA.VENDOR.15.4.0.R1.11.00.00.1168.150 platform/vendor/qcom/opensource/dsp-devicetree:AU_LINUX_ANDROID_LA.VENDOR.15.4.0.R1.11.00.00.1168.150 platform/vendor/qcom/opensource/dsp-kernel:AU_LINUX_ANDROID_LA.VENDOR.15.4.0.R1.11.00.00.1168.150 platform/vendor/qcom/opensource/graphics-devicetree:AU_TECHPACK_GRAPHICS.LA.15.0.R1.00.00.00.000.053 platform/vendor/qcom/opensource/graphics-kernel:AU_TECHPACK_GRAPHICS.LA.15.0.R1.00.00.00.000.053 platform/vendor/qcom/opensource/securemsm-kernel:AU_LINUX_ANDROID_LA.VENDOR.15.4.0.R1.11.00.00.1168.150 platform/vendor/qcom/opensource/spu-kernel:AU_LINUX_ANDROID_LA.VENDOR.15.4.0.R1.11.00.00.1168.150 platform/vendor/st/opensource/driver:AU_LINUX_ANDROID_LA.VENDOR.15.4.0.R1.11.00.00.1168.150 platform/vendor/st/opensource/eSE-driver:AU_LINUX_ANDROID_LA.VENDOR.15.4.0.R1.11.00.00.1168.150
1 parent e3df006 commit f00c62f

9 files changed

Lines changed: 87 additions & 52 deletions

File tree

‎kernel_platform/qcom/opensource/devicetree/oplus/oplus_chg/oplus-chg-23821-silicon-deep-discharge-770.dtsi‎

Lines changed: 3 additions & 0 deletions
Original file line numberDiff line numberDiff line change
@@ -1,6 +1,9 @@
11
//ifdef OPLUS_FEATURE_CHG_BASIC
22
&oplus_mms_gauge {
33
silicon_p_770 {
4+
oplus,fcl_support;
5+
oplus,fcl_index = <0>;
6+
oplus,vb_offset = <0>;
47
deep_spec,support;
58
deep_spec,uv_thr = <2800>;
69
deep_spec,count_thr = <50>;

‎kernel_platform/qcom/opensource/devicetree/oplus/oplus_chg/oplus-chg-23821-silicon-p-770.dtsi‎

Lines changed: 3 additions & 10 deletions
Original file line numberDiff line numberDiff line change
@@ -1,16 +1,9 @@
11
//ifdef OPLUS_FEATURE_CHG_BASIC
22
&oplus_chg_comm {
33
silicon_p_770 {
4-
oplus_spec,dec-vol-cc-thr = <0 400 800>;
5-
oplus_spec,dec-vol-fv-mv = <0 0 0 0 0 0 0 0 0
6-
20 20 20 20 20 20 20 0 0
7-
40 40 40 40 40 40 20 0 0>;
8-
oplus_spec,dec-vol-wired-ffc-mv = <0 0 0
9-
20 20 20
10-
40 40 20>;
11-
oplus_spec,dec-vol-wls-ffc-mv = <0 0 0
12-
20 20 20
13-
40 40 20>;
4+
oplus_spec,dec_step = <20>;
5+
oplus_spec,dec-vol-cc-full-thr = <0 400 600 800 1000 1200>;
6+
oplus_spec,dec-vol-fv-full-mv = <0 20 20 40 40 40>;
147
oplus_spec,batt-them-thr = <(-100) 0 50 120 160 350 450 530>;
158
oplus_spec,iterm-ma = <150>;
169
oplus_spec,fv-mv = <4500 4500 4500 4500 4500 4500 4475 4130 4130>;

‎kernel_platform/qcom/opensource/devicetree/oplus/oplus_chg/oplus-chg-23821.dtsi‎

Lines changed: 6 additions & 10 deletions
Original file line numberDiff line numberDiff line change
@@ -109,6 +109,9 @@
109109
oplus,gauge_ic = <&oplus_virtual_gauge>;
110110
oplus,topic-update-interval = <5000>;
111111
oplus,support_subboard_ntc;
112+
oplus,fcl_support;
113+
oplus,fcl_index = <0>;
114+
oplus,vb_offset = <0>;
112115

113116
deep_spec,support;
114117
deep_spec,uv_thr = <2800>;
@@ -660,16 +663,9 @@
660663

661664
oplus_chg_comm: oplus,comm {
662665
compatible = "oplus,common-charge";
663-
oplus_spec,dec-vol-cc-thr = <0 400 800>;
664-
oplus_spec,dec-vol-fv-mv = <0 0 0 0 0 0 0 0 0
665-
20 20 20 20 20 20 20 0 0
666-
40 40 40 40 40 40 20 0 0>;
667-
oplus_spec,dec-vol-wired-ffc-mv = <0 0 0
668-
20 20 20
669-
40 40 20>;
670-
oplus_spec,dec-vol-wls-ffc-mv = <0 0 0
671-
20 20 20
672-
40 40 20>;
666+
oplus_spec,dec_step = <20>;
667+
oplus_spec,dec-vol-cc-full-thr = <0 400 600 800 1000 1200>;
668+
oplus_spec,dec-vol-fv-full-mv = <0 20 20 40 40 40>;
673669
oplus_spec,batt-them-thr = <(-100) 0 50 120 160 350 450 530>;
674670
oplus_spec,iterm-ma = <146>;
675671
oplus_spec,fv-mv = <4500 4500 4500 4500 4500 4500 4475 4130 4130>;

‎kernel_platform/qcom/opensource/devicetree/oplus/oplus_chg/oplus-chg-23893-silicon-deep-discharge-770.dtsi‎

Lines changed: 3 additions & 0 deletions
Original file line numberDiff line numberDiff line change
@@ -1,6 +1,9 @@
11
//ifdef OPLUS_FEATURE_CHG_BASIC
22
&oplus_mms_gauge {
33
silicon_p_770 {
4+
oplus,fcl_support;
5+
oplus,fcl_index = <0>;
6+
oplus,vb_offset = <0>;
47
deep_spec,support;
58
deep_spec,uv_thr = <2800>;
69
deep_spec,count_thr = <50>;

‎vendor/oplus/kernel/mm/mm_osvelte/lowmem-dbg.c‎

Lines changed: 2 additions & 0 deletions
Original file line numberDiff line numberDiff line change
@@ -630,6 +630,8 @@ int osvelte_lowmem_dbg_init(struct kobject *root)
630630
cfg->interval = 10 * HZ;
631631
if (total_ram >= PAGES(SZ_4G + SZ_8G))
632632
cfg->watermark_low = PAGES(SZ_1G + SZ_512M);
633+
else if (total_ram >= PAGES(SZ_4G + SZ_4G))
634+
cfg->watermark_low = PAGES(SZ_1G + SZ_256M);
633635
else if (total_ram >= PAGES(SZ_2G + SZ_2G))
634636
cfg->watermark_low = PAGES(SZ_1G);
635637
else if (total_ram >= PAGES(SZ_2G + SZ_1G))

‎vendor/qcom/opensource/display-drivers/msm/dsi/dsi_panel.c‎

Lines changed: 1 addition & 1 deletion
Original file line numberDiff line numberDiff line change
@@ -5874,7 +5874,7 @@ int dsi_panel_send_roi_dcs(struct dsi_panel *panel, int ctrl_idx,
58745874
panel->name, rc);
58755875
return rc;
58765876
}
5877-
DSI_DEBUG("[%s] send roi x %d y %d w %d h %d\n", panel->name,
5877+
DSI_INFO("[%s] send roi x %d y %d w %d h %d\n", panel->name,
58785878
roi->x, roi->y, roi->w, roi->h);
58795879
SDE_EVT32(roi->x, roi->y, roi->w, roi->h);
58805880

‎vendor/qcom/opensource/display-drivers/msm/sde/sde_color_processing.c‎

Lines changed: 68 additions & 26 deletions
Original file line numberDiff line numberDiff line change
@@ -1876,6 +1876,9 @@ static int _sde_cp_crtc_check_pu_features(struct drm_crtc *crtc)
18761876
struct sde_crtc_state *sde_crtc_state;
18771877
struct sde_hw_cp_cfg hw_cfg;
18781878
struct sde_hw_dspp *hw_dspp;
1879+
struct drm_connector *conn;
1880+
struct drm_connector_list_iter conn_iter;
1881+
struct sde_connector_state *sde_conn_state = NULL;
18791882

18801883
if (!crtc) {
18811884
DRM_ERROR("invalid crtc %pK\n", crtc);
@@ -1914,8 +1917,6 @@ static int _sde_cp_crtc_check_pu_features(struct drm_crtc *crtc)
19141917

19151918
memset(&hw_cfg, 0, sizeof(hw_cfg));
19161919
hw_cfg.num_of_mixers = sde_crtc->num_mixers;
1917-
hw_cfg.payload = &sde_crtc_state->user_roi_list;
1918-
hw_cfg.len = sizeof(sde_crtc_state->user_roi_list);
19191920
hw_cfg.panel_height = sde_crtc_state->base.adjusted_mode.vdisplay;
19201921
hw_cfg.panel_width = sde_crtc_state->base.adjusted_mode.hdisplay;
19211922

@@ -1930,6 +1931,41 @@ static int _sde_cp_crtc_check_pu_features(struct drm_crtc *crtc)
19301931
!(sde_crtc->cp_pu_feature_mask & BIT(i)))
19311932
continue;
19321933

1934+
/* get ROIs from connector if RC and destination scaler is enabled */
1935+
if (i == SDE_CP_CRTC_DSPP_RC_PU && sde_crtc_state->num_ds_enabled) {
1936+
mutex_lock(&crtc->dev->mode_config.mutex);
1937+
drm_connector_list_iter_begin(crtc->dev, &conn_iter);
1938+
drm_for_each_connector_iter(conn, &conn_iter) {
1939+
if (conn->state && (conn->state->crtc != crtc))
1940+
continue;
1941+
1942+
if (conn->connector_type == DRM_MODE_CONNECTOR_VIRTUAL)
1943+
continue;
1944+
1945+
sde_conn_state = to_sde_connector_state(conn->state);
1946+
if (sde_conn_state) {
1947+
/* Take reference to prevent state changes */
1948+
drm_connector_get(conn);
1949+
break;
1950+
}
1951+
}
1952+
drm_connector_list_iter_end(&conn_iter);
1953+
mutex_unlock(&crtc->dev->mode_config.mutex);
1954+
1955+
if (!sde_conn_state) {
1956+
DRM_ERROR("invalid sde_conn_state %pK\n", sde_conn_state);
1957+
return -EINVAL;
1958+
}
1959+
hw_cfg.payload = (sde_conn_state->rois.num_rects) ?
1960+
&sde_conn_state->rois : NULL;
1961+
hw_cfg.len = sizeof(sde_conn_state->rois);
1962+
drm_connector_put(conn);
1963+
} else {
1964+
hw_cfg.payload = (sde_crtc_state->user_roi_list.num_rects) ?
1965+
&sde_crtc_state->user_roi_list : NULL;
1966+
hw_cfg.len = sizeof(sde_crtc_state->user_roi_list);
1967+
}
1968+
19331969
SDE_EVT32(i, hw_cfg.panel_width, hw_cfg.panel_height);
19341970
for (j = 0; j < hw_cfg.num_of_mixers; j++) {
19351971
hw_dspp = sde_crtc->mixers[j].hw_dspp;
@@ -2025,7 +2061,9 @@ static int _sde_cp_crtc_update_pu_features(struct drm_crtc *crtc, bool *need_flu
20252061
struct sde_hw_dspp *hw_dspp;
20262062
struct sde_hw_mixer *hw_lm;
20272063
struct sde_mdss_cfg *catalog;
2028-
struct sde_rect user_rect, cached_rect;
2064+
struct drm_connector *conn;
2065+
struct drm_connector_list_iter conn_iter;
2066+
struct sde_connector_state *sde_conn_state = NULL;
20292067

20302068
if (!need_flush) {
20312069
DRM_ERROR("invalid need_flush %pK\n", need_flush);
@@ -2061,22 +2099,6 @@ static int _sde_cp_crtc_update_pu_features(struct drm_crtc *crtc, bool *need_flu
20612099
}
20622100
}
20632101

2064-
/* early return if not a partial update frame or no change in rois */
2065-
if (sde_crtc_state->user_roi_list.num_rects == 0) {
2066-
DRM_DEBUG_DRIVER("no partial update required\n");
2067-
memset(&sde_crtc_state->cached_user_roi_list, 0,
2068-
sizeof(struct msm_roi_list));
2069-
} else {
2070-
sde_kms_rect_merge_rectangles(&sde_crtc_state->user_roi_list,
2071-
&user_rect);
2072-
sde_kms_rect_merge_rectangles(&sde_crtc_state->cached_user_roi_list,
2073-
&cached_rect);
2074-
if (sde_kms_rect_is_equal(&user_rect, &cached_rect)) {
2075-
DRM_DEBUG_DRIVER("no change in list of ROIs\n");
2076-
return 0;
2077-
}
2078-
}
2079-
20802102
SDE_EVT32(0xbbbb, sde_crtc_state->user_roi_list.num_rects);
20812103
if (sde_crtc_state->user_roi_list.num_rects) {
20822104
SDE_EVT32(sde_crtc_state->user_roi_list.num_rects, sde_crtc_state->user_roi_list.roi[0].x1,
@@ -2090,9 +2112,6 @@ static int _sde_cp_crtc_update_pu_features(struct drm_crtc *crtc, bool *need_flu
20902112
memset(&hw_cfg, 0, sizeof(hw_cfg));
20912113
hw_cfg.num_of_mixers = _sde_cp_get_num_dspp_mixers(sde_crtc);
20922114
hw_cfg.broadcast_disabled = catalog->dma_cfg.broadcast_disabled;
2093-
hw_cfg.payload = (sde_crtc_state->user_roi_list.num_rects) ?
2094-
&sde_crtc_state->user_roi_list : NULL;
2095-
hw_cfg.len = sizeof(sde_crtc_state->user_roi_list);
20962115
hw_cfg.panel_height = sde_crtc->base.state->adjusted_mode.vdisplay;
20972116
hw_cfg.panel_width = sde_crtc->base.state->adjusted_mode.hdisplay;
20982117
for (i = 0; i < hw_cfg.num_of_mixers; i++)
@@ -2110,6 +2129,33 @@ static int _sde_cp_crtc_update_pu_features(struct drm_crtc *crtc, bool *need_flu
21102129
continue;
21112130
}
21122131

2132+
/* get ROIs from connector for RC if destination scaler is enabled */
2133+
if (i == SDE_CP_CRTC_DSPP_RC_PU && sde_crtc_state->num_ds_enabled) {
2134+
drm_connector_list_iter_begin(crtc->dev, &conn_iter);
2135+
drm_for_each_connector_iter(conn, &conn_iter) {
2136+
if (conn->state && (conn->state->crtc != crtc))
2137+
continue;
2138+
2139+
if (conn->connector_type == DRM_MODE_CONNECTOR_VIRTUAL)
2140+
continue;
2141+
2142+
sde_conn_state = to_sde_connector_state(conn->state);
2143+
break;
2144+
}
2145+
drm_connector_list_iter_end(&conn_iter);
2146+
if (!sde_conn_state) {
2147+
DRM_ERROR("invalid sde_conn_state %pK\n", sde_conn_state);
2148+
return -EINVAL;
2149+
}
2150+
hw_cfg.payload = (sde_conn_state->rois.num_rects) ?
2151+
&sde_conn_state->rois : NULL;
2152+
hw_cfg.len = sizeof(sde_conn_state->rois);
2153+
} else {
2154+
hw_cfg.payload = (sde_crtc_state->user_roi_list.num_rects) ?
2155+
&sde_crtc_state->user_roi_list : NULL;
2156+
hw_cfg.len = sizeof(sde_crtc_state->user_roi_list);
2157+
}
2158+
21132159
SDE_EVT32(i, hw_cfg.panel_width, hw_cfg.panel_height);
21142160
for (j = 0; j < hw_cfg.num_of_mixers; j++) {
21152161
hw_lm = sde_crtc->mixers[j].hw_lm;
@@ -2135,10 +2181,6 @@ static int _sde_cp_crtc_update_pu_features(struct drm_crtc *crtc, bool *need_flu
21352181
}
21362182
}
21372183

2138-
memcpy(&sde_crtc_state->cached_user_roi_list,
2139-
&sde_crtc_state->user_roi_list,
2140-
sizeof(struct msm_roi_list));
2141-
21422184
return 0;
21432185
}
21442186

‎vendor/qcom/opensource/display-drivers/msm/sde/sde_crtc.c‎

Lines changed: 0 additions & 3 deletions
Original file line numberDiff line numberDiff line change
@@ -1228,7 +1228,6 @@ static int _sde_crtc_set_roi_v1(struct drm_crtc_state *state,
12281228
crtc = cstate->base.crtc;
12291229

12301230
memset(&cstate->user_roi_list, 0, sizeof(cstate->user_roi_list));
1231-
memset(&cstate->cached_user_roi_list, 0, sizeof(cstate->cached_user_roi_list));
12321231

12331232
if (!usr_ptr) {
12341233
SDE_DEBUG("crtc%d: rois cleared\n", DRMID(crtc));
@@ -5783,8 +5782,6 @@ void sde_crtc_reset_sw_state(struct drm_crtc *crtc)
57835782
if (cstate->num_ds_enabled)
57845783
set_bit(SDE_CRTC_DIRTY_DEST_SCALER, cstate->dirty);
57855784

5786-
/* wipe out cached CRTC ROI so PU is seen as dirty next update */
5787-
memset(&cstate->cached_user_roi_list, 0, sizeof(cstate->cached_user_roi_list));
57885785
SDE_EVT32(0xcccc);
57895786
}
57905787

‎vendor/qcom/opensource/display-drivers/msm/sde/sde_crtc.h‎

Lines changed: 1 addition & 2 deletions
Original file line numberDiff line numberDiff line change
@@ -550,7 +550,6 @@ struct sde_line_insertion_param {
550550
* @lm_roi : Current LM ROI, possibly sub-rectangle of mode.
551551
* Origin top left of CRTC.
552552
* @user_roi_list : List of user's requested ROIs as from set property
553-
* @cached_user_roi_list : Copy of user_roi_list from previous PU frame
554553
* @property_state: Local storage for msm_prop properties
555554
* @property_values: Current crtc property values
556555
* @input_fence_timeout_ns : Cached input fence timeout, in ns
@@ -592,7 +591,7 @@ struct sde_crtc_state {
592591
struct sde_rect crtc_roi;
593592
struct sde_rect lm_bounds[MAX_MIXERS_PER_CRTC];
594593
struct sde_rect lm_roi[MAX_MIXERS_PER_CRTC];
595-
struct msm_roi_list user_roi_list, cached_user_roi_list;
594+
struct msm_roi_list user_roi_list;
596595

597596
struct msm_property_state property_state;
598597
struct msm_property_value property_values[CRTC_PROP_COUNT];

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