@@ -49,12 +49,12 @@ FLOAT CNAME(BLASLONG n, FLOAT *x, BLASLONG inc_x, FLOAT *y, BLASLONG inc_y)
4949 vfloat32m4_t vx = __riscv_vle32_v_f32m4 (x , vl );
5050 vfloat32m4_t vy = __riscv_vle32_v_f32m4 (y , vl );
5151
52- vr = __riscv_vfwmacc_vv_f64m8 (vr , vx , vy , vl );
52+ vr = __riscv_vfwmacc_vv_f64m8_tu (vr , vx , vy , vl );
5353#else
5454 vfloat64m8_t vx = __riscv_vle64_v_f64m8 (x , vl );
5555 vfloat64m8_t vy = __riscv_vle64_v_f64m8 (y , vl );
5656
57- vr = __riscv_vfmacc_vv_f64m8 (vr , vx , vy , vl );
57+ vr = __riscv_vfmacc_vv_f64m8_tu (vr , vx , vy , vl );
5858#endif
5959 }
6060
@@ -69,12 +69,12 @@ FLOAT CNAME(BLASLONG n, FLOAT *x, BLASLONG inc_x, FLOAT *y, BLASLONG inc_y)
6969 vfloat32m4_t vx = __riscv_vle32_v_f32m4 (x , vl );
7070 vfloat32m4_t vy = __riscv_vlse32_v_f32m4 (y , stride_y , vl );
7171
72- vr = __riscv_vfwmacc_vv_f64m8 (vr , vx , vy , vl );
72+ vr = __riscv_vfwmacc_vv_f64m8_tu (vr , vx , vy , vl );
7373#else
7474 vfloat64m8_t vx = __riscv_vle64_v_f64m8 (x , vl );
7575 vfloat64m8_t vy = __riscv_vlse64_v_f64m8 (y , stride_y , vl );
7676
77- vr = __riscv_vfmacc_vv_f64m8 (vr , vx , vy , vl );
77+ vr = __riscv_vfmacc_vv_f64m8_tu (vr , vx , vy , vl );
7878#endif
7979 }
8080 } else if (1 == inc_y ) {
@@ -88,12 +88,12 @@ FLOAT CNAME(BLASLONG n, FLOAT *x, BLASLONG inc_x, FLOAT *y, BLASLONG inc_y)
8888 vfloat32m4_t vx = __riscv_vlse32_v_f32m4 (x , stride_x , vl );
8989 vfloat32m4_t vy = __riscv_vle32_v_f32m4 (y , vl );
9090
91- vr = __riscv_vfwmacc_vv_f64m8 (vr , vx , vy , vl );
91+ vr = __riscv_vfwmacc_vv_f64m8_tu (vr , vx , vy , vl );
9292#else
9393 vfloat64m8_t vx = __riscv_vlse64_v_f64m8 (x , stride_x , vl );
9494 vfloat64m8_t vy = __riscv_vle64_v_f64m8 (y , vl );
9595
96- vr = __riscv_vfmacc_vv_f64m8 (vr , vx , vy , vl );
96+ vr = __riscv_vfmacc_vv_f64m8_tu (vr , vx , vy , vl );
9797#endif
9898 }
9999 } else {
@@ -108,12 +108,12 @@ FLOAT CNAME(BLASLONG n, FLOAT *x, BLASLONG inc_x, FLOAT *y, BLASLONG inc_y)
108108 vfloat32m4_t vx = __riscv_vlse32_v_f32m4 (x , stride_x , vl );
109109 vfloat32m4_t vy = __riscv_vlse32_v_f32m4 (y , stride_y , vl );
110110
111- vr = __riscv_vfwmacc_vv_f64m8 (vr , vx , vy , vl );
111+ vr = __riscv_vfwmacc_vv_f64m8_tu (vr , vx , vy , vl );
112112#else
113113 vfloat64m8_t vx = __riscv_vlse64_v_f64m8 (x , stride_x , vl );
114114 vfloat64m8_t vy = __riscv_vlse64_v_f64m8 (y , stride_y , vl );
115115
116- vr = __riscv_vfmacc_vv_f64m8 (vr , vx , vy , vl );
116+ vr = __riscv_vfmacc_vv_f64m8_tu (vr , vx , vy , vl );
117117#endif
118118 }
119119 }
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