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martin-frbgmartin-frbg
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Merge pull request #3586 from martin-frbg/arm64cpus
Initial support for M1 on Linux, Phytium FT2000 series, ARMV9 Cortex X1,X2,A510,A710
2 parents a3d2514 + b3b4672 commit 5d2f451

12 files changed

Lines changed: 1084 additions & 25 deletions

‎Makefile.arm64‎

Lines changed: 44 additions & 0 deletions
Original file line numberDiff line numberDiff line change
@@ -55,6 +55,13 @@ FCOMMON_OPT += -march=armv8-a -mtune=cortex-a73
5555
endif
5656
endif
5757

58+
ifeq ($(CORE), FT2000)
59+
CCOMMON_OPT += -march=armv8-a -mtune=cortex-a72
60+
ifneq ($(F_COMPILER), NAG)
61+
FCOMMON_OPT += -march=armv8-a -mtune=cortex-a72
62+
endif
63+
endif
64+
5865
# Use a72 tunings because Neoverse-N1 is only available
5966
# in GCC>=9
6067
ifeq ($(CORE), NEOVERSEN1)
@@ -229,6 +236,43 @@ endif
229236
endif
230237
endif
231238

239+
ifeq (1, $(filter 1,$(GCCVERSIONGTEQ11) $(ISCLANG)))
240+
ifeq ($(CORE), CORTEXX1)
241+
CCOMMON_OPT += -march=armv9 -mtune=cortexx1
242+
ifneq ($(F_COMPILER), NAG)
243+
FCOMMON_OPT += -march=armv9 -mtune=cortexx1
244+
endif
245+
endif
246+
endif
247+
248+
ifeq (1, $(filter 1,$(GCCVERSIONGTEQ11) $(ISCLANG)))
249+
ifeq ($(CORE), CORTEXX2)
250+
CCOMMON_OPT += -march=armv9 -mtune=cortexx2
251+
ifneq ($(F_COMPILER), NAG)
252+
FCOMMON_OPT += -march=armv9 -mtune=cortexx2
253+
endif
254+
endif
255+
endif
256+
257+
#ifeq (1, $(filter 1,$(ISCLANG)))
258+
ifeq (1, $(filter 1,$(GCCVERSIONGTEQ11) $(ISCLANG)))
259+
ifeq ($(CORE), CORTEXA510)
260+
CCOMMON_OPT += -march=armv8.4-a+sve
261+
ifneq ($(F_COMPILER), NAG)
262+
FCOMMON_OPT += -march=armv8.4-a+sve
263+
endif
264+
endif
265+
endif
266+
267+
ifeq (1, $(filter 1,$(GCCVERSIONGTEQ11) $(ISCLANG)))
268+
ifeq ($(CORE), CORTEXA710)
269+
CCOMMON_OPT += -march=armv8.2-a+sve -mtune=cortexa710
270+
ifneq ($(F_COMPILER), NAG)
271+
FCOMMON_OPT += -march=armv8.2-a+sve -mtune=cortexa710
272+
endif
273+
endif
274+
endif
275+
232276
endif
233277

234278
endif

‎TargetList.txt‎

Lines changed: 7 additions & 0 deletions
Original file line numberDiff line numberDiff line change
@@ -92,6 +92,10 @@ CORTEXA53
9292
CORTEXA57
9393
CORTEXA72
9494
CORTEXA73
95+
CORTEXA510
96+
CORTEXA710
97+
CORTEXX1
98+
CORTEXX2
9599
NEOVERSEN1
96100
NEOVERSEV1
97101
NEOVERSEN2
@@ -103,6 +107,9 @@ THUNDERX2T99
103107
TSV110
104108
THUNDERX3T110
105109
VORTEX
110+
A64FX
111+
ARMV8SVE
112+
FT2000
106113

107114
9.System Z:
108115
ZARCH_GENERIC

‎c_check‎

Lines changed: 1 addition & 0 deletions
Original file line numberDiff line numberDiff line change
@@ -316,6 +316,7 @@ if ($architecture ne $hostarch) {
316316
}
317317

318318
$cross = 1 if ($os ne $hostos);
319+
$cross = 0 if (($os eq "Android") && ($hostos eq "Linux") && ($ENV{TERMUX_APP_PID} != ""));
319320

320321
$openmp = "" if $ENV{USE_OPENMP} != 1;
321322

‎cmake/cc.cmake‎

Lines changed: 24 additions & 0 deletions
Original file line numberDiff line numberDiff line change
@@ -161,6 +161,30 @@ if (${CORE} STREQUAL ARMV8SVE)
161161
endif ()
162162
endif ()
163163

164+
if (${CORE} STREQUAL CORTEXA510)
165+
if (NOT DYNAMIC_ARCH)
166+
set (CCOMMON_OPT "${CCOMMON_OPT} -march=armv8-a+sve")
167+
endif ()
168+
endif ()
169+
170+
if (${CORE} STREQUAL CORTEXA710)
171+
if (NOT DYNAMIC_ARCH)
172+
set (CCOMMON_OPT "${CCOMMON_OPT} -march=armv8-a+sve")
173+
endif ()
174+
endif ()
175+
176+
if (${CORE} STREQUAL CORTEXX1)
177+
if (NOT DYNAMIC_ARCH)
178+
set (CCOMMON_OPT "${CCOMMON_OPT} -march=armv8-a+sve")
179+
endif ()
180+
endif ()
181+
182+
if (${CORE} STREQUAL CORTEXX2)
183+
if (NOT DYNAMIC_ARCH)
184+
set (CCOMMON_OPT "${CCOMMON_OPT} -march=armv8-a+sve")
185+
endif ()
186+
endif ()
187+
164188
if (${CORE} STREQUAL POWER10)
165189
if (NOT DYNAMIC_ARCH)
166190
execute_process(COMMAND ${CMAKE_C_COMPILER} -dumpversion OUTPUT_VARIABLE GCC_VERSION)

‎cpuid_arm64.c‎

Lines changed: 67 additions & 9 deletions
Original file line numberDiff line numberDiff line change
@@ -45,6 +45,10 @@ size_t length64=sizeof(value64);
4545
#define CPU_NEOVERSEN1 11
4646
#define CPU_NEOVERSEV1 16
4747
#define CPU_NEOVERSEN2 17
48+
#define CPU_CORTEXX1 18
49+
#define CPU_CORTEXX2 19
50+
#define CPU_CORTEXA510 20
51+
#define CPU_CORTEXA710 21
4852
// Qualcomm
4953
#define CPU_FALKOR 6
5054
// Cavium
@@ -59,6 +63,8 @@ size_t length64=sizeof(value64);
5963
#define CPU_VORTEX 13
6064
// Fujitsu
6165
#define CPU_A64FX 15
66+
// Phytium
67+
#define CPU_FT2000 22
6268

6369
static char *cpuname[] = {
6470
"UNKNOWN",
@@ -73,12 +79,17 @@ static char *cpuname[] = {
7379
"TSV110",
7480
"EMAG8180",
7581
"NEOVERSEN1",
76-
"NEOVERSEV1"
77-
"NEOVERSEN2"
7882
"THUNDERX3T110",
7983
"VORTEX",
8084
"CORTEXA55",
81-
"A64FX"
85+
"A64FX",
86+
"NEOVERSEV1",
87+
"NEOVERSEN2",
88+
"CORTEXX1",
89+
"CORTEXX2",
90+
"CORTEXA510",
91+
"CORTEXA710",
92+
"FT2000"
8293
};
8394

8495
static char *cpuname_lower[] = {
@@ -94,12 +105,17 @@ static char *cpuname_lower[] = {
94105
"tsv110",
95106
"emag8180",
96107
"neoversen1",
97-
"neoversev1",
98-
"neoversen2",
99108
"thunderx3t110",
100109
"vortex",
101110
"cortexa55",
102-
"a64fx"
111+
"a64fx",
112+
"neoversev1",
113+
"neoversen2",
114+
"cortexx1",
115+
"cortexx2",
116+
"cortexa510",
117+
"cortexa710",
118+
"ft2000"
103119
};
104120

105121
int get_feature(char *search)
@@ -182,6 +198,14 @@ int detect(void)
182198
return CPU_NEOVERSEN2;
183199
else if (strstr(cpu_part, "0xd05"))
184200
return CPU_CORTEXA55;
201+
else if (strstr(cpu_part, "0xd46"))
202+
return CPU_CORTEXA510;
203+
else if (strstr(cpu_part, "0xd47"))
204+
return CPU_CORTEXA710;
205+
else if (strstr(cpu_part, "0xd44"))
206+
return CPU_CORTEXX1;
207+
else if (strstr(cpu_part, "0xd4c"))
208+
return CPU_CORTEXX2;
185209
}
186210
// Qualcomm
187211
else if (strstr(cpu_implementer, "0x51") && strstr(cpu_part, "0xc00"))
@@ -202,6 +226,13 @@ int detect(void)
202226
// Fujitsu
203227
else if (strstr(cpu_implementer, "0x46") && strstr(cpu_part, "0x001"))
204228
return CPU_A64FX;
229+
// Apple
230+
else if (strstr(cpu_implementer, "0x61") && strstr(cpu_part, "0x022"))
231+
return CPU_VORTEX;
232+
// Phytium
233+
else if (strstr(cpu_implementer, "0x70") && (strstr(cpu_part, "0x660") || strstr(cpu_part, "0x661")
234+
|| strstr(cpu_part, "0x662") || strstr(cpu_part, "0x663")))
235+
return CPU_FT2000;
205236
}
206237

207238
p = (char *) NULL ;
@@ -382,7 +413,24 @@ void get_cpuconfig(void)
382413
printf("#define DTB_DEFAULT_ENTRIES 48\n");
383414
printf("#define DTB_SIZE 4096\n");
384415
break;
385-
416+
case CPU_CORTEXA510:
417+
case CPU_CORTEXA710:
418+
case CPU_CORTEXX1:
419+
case CPU_CORTEXX2:
420+
printf("#define ARMV9\n");
421+
printf("#define %s\n", cpuname[d]);
422+
printf("#define L1_CODE_SIZE 65536\n");
423+
printf("#define L1_CODE_LINESIZE 64\n");
424+
printf("#define L1_CODE_ASSOCIATIVE 4\n");
425+
printf("#define L1_DATA_SIZE 65536\n");
426+
printf("#define L1_DATA_LINESIZE 64\n");
427+
printf("#define L1_DATA_ASSOCIATIVE 4\n");
428+
printf("#define L2_SIZE 1048576\n");
429+
printf("#define L2_LINESIZE 64\n");
430+
printf("#define L2_ASSOCIATIVE 8\n");
431+
printf("#define DTB_DEFAULT_ENTRIES 64\n");
432+
printf("#define DTB_SIZE 4096\n");
433+
break;
386434
case CPU_FALKOR:
387435
printf("#define FALKOR\n");
388436
printf("#define L1_CODE_SIZE 65536\n");
@@ -469,9 +517,9 @@ void get_cpuconfig(void)
469517
printf("#define DTB_DEFAULT_ENTRIES 64 \n");
470518
printf("#define DTB_SIZE 4096 \n");
471519
break;
472-
#ifdef __APPLE__
473520
case CPU_VORTEX:
474521
printf("#define VORTEX \n");
522+
#ifdef __APPLE__
475523
sysctlbyname("hw.l1icachesize",&value64,&length64,NULL,0);
476524
printf("#define L1_CODE_SIZE %lld \n",value64);
477525
sysctlbyname("hw.cachelinesize",&value64,&length64,NULL,0);
@@ -480,10 +528,10 @@ void get_cpuconfig(void)
480528
printf("#define L1_DATA_SIZE %lld \n",value64);
481529
sysctlbyname("hw.l2cachesize",&value64,&length64,NULL,0);
482530
printf("#define L2_SIZE %lld \n",value64);
531+
#endif
483532
printf("#define DTB_DEFAULT_ENTRIES 64 \n");
484533
printf("#define DTB_SIZE 4096 \n");
485534
break;
486-
#endif
487535
case CPU_A64FX:
488536
printf("#define A64FX\n");
489537
printf("#define L1_CODE_SIZE 65535\n");
@@ -494,6 +542,16 @@ void get_cpuconfig(void)
494542
printf("#define DTB_DEFAULT_ENTRIES 64\n");
495543
printf("#define DTB_SIZE 4096\n");
496544
break;
545+
case CPU_FT2000:
546+
printf("#define FT2000\n");
547+
printf("#define L1_CODE_SIZE 32768\n");
548+
printf("#define L1_DATA_SIZE 32768\n");
549+
printf("#define L1_DATA_LINESIZE 64\n");
550+
printf("#define L2_SIZE 33554432\n");
551+
printf("#define L2_LINESIZE 64\n");
552+
printf("#define DTB_DEFAULT_ENTRIES 64\n");
553+
printf("#define DTB_SIZE 4096\n");
554+
break;
497555
}
498556
get_cpucount();
499557
}

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