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bsp: [gd32] add GD32VW553 hw timer support. (#11157)
* bsp: [gd32] add GD32VW553 hw timer support. * bsp: [gd32] add GD32VW553 hw timer config.
1 parent 737ae54 commit bb1b52d

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‎bsp/gd32/risc-v/gd32vw553h-eval/board/Kconfig‎

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@@ -165,6 +165,31 @@ menu "On-chip Peripheral Drivers"
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range 10 1000
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endif
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menuconfig BSP_USING_HWTIMER
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bool "Enable timer"
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default n
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select RT_USING_HWTIMER
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if BSP_USING_HWTIMER
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config BSP_USING_HWTIMER0
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bool "Enable TIM0"
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default n
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config BSP_USING_HWTIMER1
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bool "Enable TIM1"
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default n
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config BSP_USING_HWTIMER2
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bool "Enable TIM2"
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default n
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config BSP_USING_HWTIMER5
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bool "Enable TIM5"
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default n
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config BSP_USING_HWTIMER15
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bool "Enable TIM15"
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default n
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config BSP_USING_HWTIMER16
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bool "Enable TIM16"
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default n
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endif
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source "$(BSP_DIR)/../libraries/gd32_drivers/Kconfig"
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endmenu

‎bsp/gd32/risc-v/libraries/gd32_drivers/SConscript‎

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@@ -53,6 +53,7 @@ if GetDepend(['RT_USING_PWM', 'SOC_GD32VW553H']):
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src += ['drv_pwm.c']
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path = [cwd]
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path += [cwd + "/config"]
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group = DefineGroup('Drivers', src, depend = [''], CPPPATH = path)
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‎bsp/gd32/risc-v/libraries/gd32_drivers/config/hwtimer_config.h‎

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/*
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* Copyright (c) 2006-2025, RT-Thread Development Team
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*
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* SPDX-License-Identifier: Apache-2.0
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*
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* Change Logs:
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* Date Author Notes
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* 2026-01-30 pomin first version
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*/
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#ifndef __HWTIMER_CONFIG_H__
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#define __HWTIMER_CONFIG_H__
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#include <rtthread.h>
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#include <board.h>
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#ifdef __cplusplus
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extern "C" {
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#endif
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#include "drv_hwtimer.h"
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#ifdef BSP_USING_HWTIMER0
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#ifndef HWTIMER0_CONFIG
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#define HWTIMER0_CONFIG \
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{ \
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"timer0", \
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{ \
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TIMER0, \
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TIMER0_UP_IRQn, \
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RCU_TIMER0, \
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}, \
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{0}, \
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{ \
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1000000, \
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1000, \
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0xffff, \
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0, /* count up mode */ \
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} \
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}
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#endif /* HWTIMER0_CONFIG */
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#endif /* BSP_USING_HWTIMER0 */
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#ifdef BSP_USING_HWTIMER1
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#ifndef HWTIMER1_CONFIG
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#define HWTIMER1_CONFIG \
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{ \
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"timer1", \
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{ \
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TIMER1, \
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TIMER1_IRQn, \
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RCU_TIMER1, \
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}, \
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{0}, \
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{ \
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1000000, \
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1000, \
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0xffff, \
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0, /* count up mode */ \
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} \
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}
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#endif /* HWTIMER1_CONFIG */
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#endif /* BSP_USING_HWTIMER1 */
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#ifdef BSP_USING_HWTIMER2
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#ifndef HWTIMER2_CONFIG
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#define HWTIMER2_CONFIG \
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{ \
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"timer2", \
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{ \
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TIMER2, \
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TIMER2_IRQn, \
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RCU_TIMER2, \
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}, \
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{0}, \
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{ \
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1000000, \
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1000, \
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0xffff, \
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0, /* count up mode */ \
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} \
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}
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#endif /* HWTIMER2_CONFIG */
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#endif /* BSP_USING_HWTIMER2 */
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#ifdef BSP_USING_HWTIMER5
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#ifndef HWTIMER5_CONFIG
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#define HWTIMER5_CONFIG \
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{ \
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"timer5", \
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{ \
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TIMER5, \
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TIMER5_IRQn, \
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RCU_TIMER5, \
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}, \
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{0}, \
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{ \
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1000000, \
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1000, \
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0xffff, \
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0, /* count up mode */ \
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} \
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}
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#endif /* HWTIMER5_CONFIG */
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#endif /* BSP_USING_HWTIMER5 */
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#ifdef BSP_USING_HWTIMER15
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#ifndef HWTIMER15_CONFIG
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#define HWTIMER15_CONFIG \
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{ \
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"timer15", \
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{ \
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TIMER15, \
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TIMER15_IRQn, \
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RCU_TIMER15, \
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}, \
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{0}, \
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{ \
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1000000, \
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1000, \
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0xffff, \
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0, /* count up mode */ \
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} \
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}
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#endif /* HWTIMER15_CONFIG */
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#endif /* BSP_USING_HWTIMER15 */
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#ifdef BSP_USING_HWTIMER16
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#ifndef HWTIMER16_CONFIG
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#define HWTIMER16_CONFIG \
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{ \
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"timer16", \
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{ \
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TIMER16, \
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TIMER16_IRQn, \
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RCU_TIMER16, \
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}, \
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{0}, \
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{ \
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1000000, \
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1000, \
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0xffff, \
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0, /* count up mode */ \
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} \
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}
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#endif /* HWTIMER16_CONFIG */
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#endif /* BSP_USING_HWTIMER16 */
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#ifdef __cplusplus
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}
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#endif
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#endif /* __HWTIMER_CONFIG_H__ */

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