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x86/insn: Add misc instructions to x86 instruction decoder
x86 instruction decoder is used for both kernel instructions and user space instructions (e.g. uprobes, perf tools Intel PT), so it is good to update it with new instructions. Add instructions to x86 instruction decoder: User Interrupt clui senduipi stui testui uiret Prediction history reset hreset Serialize instruction execution serialize TSX suspend load address tracking xresldtrk xsusldtrk Reference: Intel Architecture Instruction Set Extensions and Future Features Programming Reference May 2021 Document Number: 319433-044 Example using perf tools' x86 instruction decoder test: $ perf test -v "x86 instruction decoder" |& grep -i hreset Decoded ok: f3 0f 3a f0 c0 00 hreset $0x0 Decoded ok: f3 0f 3a f0 c0 00 hreset $0x0 Signed-off-by: Adrian Hunter <adrian.hunter@intel.com> Signed-off-by: Borislav Petkov <bp@suse.de> Acked-by: Arnaldo Carvalho de Melo <acme@redhat.com> Acked-by: Masami Hiramatsu <mhiramat@kernel.org> Link: https://lore.kernel.org/r/20211202095029.2165714-5-adrian.hunter@intel.com
1 parent a6ea114 commit 0153d98

2 files changed

Lines changed: 6 additions & 6 deletions

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arch/x86/lib/x86-opcode-map.txt

Lines changed: 3 additions & 3 deletions
Original file line numberDiff line numberDiff line change
@@ -893,7 +893,7 @@ cc: sha1rnds4 Vdq,Wdq,Ib
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ce: vgf2p8affineqb Vx,Wx,Ib (66)
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cf: vgf2p8affineinvqb Vx,Wx,Ib (66)
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df: VAESKEYGEN Vdq,Wdq,Ib (66),(v1)
896-
f0: RORX Gy,Ey,Ib (F2),(v)
896+
f0: RORX Gy,Ey,Ib (F2),(v) | HRESET Gv,Ib (F3),(000),(11B)
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EndTable
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899899
GrpTable: Grp1
@@ -976,7 +976,7 @@ GrpTable: Grp7
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2: LGDT Ms | XGETBV (000),(11B) | XSETBV (001),(11B) | VMFUNC (100),(11B) | XEND (101)(11B) | XTEST (110)(11B) | ENCLU (111),(11B)
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3: LIDT Ms
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4: SMSW Mw/Rv
979-
5: rdpkru (110),(11B) | wrpkru (111),(11B) | SAVEPREVSSP (F3),(010),(11B) | RSTORSSP Mq (F3) | SETSSBSY (F3),(000),(11B)
979+
5: rdpkru (110),(11B) | wrpkru (111),(11B) | SAVEPREVSSP (F3),(010),(11B) | RSTORSSP Mq (F3) | SETSSBSY (F3),(000),(11B) | CLUI (F3),(110),(11B) | SERIALIZE (000),(11B) | STUI (F3),(111),(11B) | TESTUI (F3)(101)(11B) | UIRET (F3),(100),(11B) | XRESLDTRK (F2),(000),(11B) | XSUSLDTRK (F2),(001),(11B)
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6: LMSW Ew
981981
7: INVLPG Mb | SWAPGS (o64),(000),(11B) | RDTSCP (001),(11B)
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EndTable
@@ -993,7 +993,7 @@ GrpTable: Grp9
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3: xrstors
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4: xsavec
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5: xsaves
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6: VMPTRLD Mq | VMCLEAR Mq (66) | VMXON Mq (F3) | RDRAND Rv (11B)
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6: VMPTRLD Mq | VMCLEAR Mq (66) | VMXON Mq (F3) | RDRAND Rv (11B) | SENDUIPI Gq (F3)
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7: VMPTRST Mq | VMPTRST Mq (F3) | RDSEED Rv (11B)
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EndTable
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tools/arch/x86/lib/x86-opcode-map.txt

Lines changed: 3 additions & 3 deletions
Original file line numberDiff line numberDiff line change
@@ -893,7 +893,7 @@ cc: sha1rnds4 Vdq,Wdq,Ib
893893
ce: vgf2p8affineqb Vx,Wx,Ib (66)
894894
cf: vgf2p8affineinvqb Vx,Wx,Ib (66)
895895
df: VAESKEYGEN Vdq,Wdq,Ib (66),(v1)
896-
f0: RORX Gy,Ey,Ib (F2),(v)
896+
f0: RORX Gy,Ey,Ib (F2),(v) | HRESET Gv,Ib (F3),(000),(11B)
897897
EndTable
898898

899899
GrpTable: Grp1
@@ -976,7 +976,7 @@ GrpTable: Grp7
976976
2: LGDT Ms | XGETBV (000),(11B) | XSETBV (001),(11B) | VMFUNC (100),(11B) | XEND (101)(11B) | XTEST (110)(11B) | ENCLU (111),(11B)
977977
3: LIDT Ms
978978
4: SMSW Mw/Rv
979-
5: rdpkru (110),(11B) | wrpkru (111),(11B) | SAVEPREVSSP (F3),(010),(11B) | RSTORSSP Mq (F3) | SETSSBSY (F3),(000),(11B)
979+
5: rdpkru (110),(11B) | wrpkru (111),(11B) | SAVEPREVSSP (F3),(010),(11B) | RSTORSSP Mq (F3) | SETSSBSY (F3),(000),(11B) | CLUI (F3),(110),(11B) | SERIALIZE (000),(11B) | STUI (F3),(111),(11B) | TESTUI (F3)(101)(11B) | UIRET (F3),(100),(11B) | XRESLDTRK (F2),(000),(11B) | XSUSLDTRK (F2),(001),(11B)
980980
6: LMSW Ew
981981
7: INVLPG Mb | SWAPGS (o64),(000),(11B) | RDTSCP (001),(11B)
982982
EndTable
@@ -993,7 +993,7 @@ GrpTable: Grp9
993993
3: xrstors
994994
4: xsavec
995995
5: xsaves
996-
6: VMPTRLD Mq | VMCLEAR Mq (66) | VMXON Mq (F3) | RDRAND Rv (11B)
996+
6: VMPTRLD Mq | VMCLEAR Mq (66) | VMXON Mq (F3) | RDRAND Rv (11B) | SENDUIPI Gq (F3)
997997
7: VMPTRST Mq | VMPTRST Mq (F3) | RDSEED Rv (11B)
998998
EndTable
999999

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