@@ -176,9 +176,6 @@ static int vcn_v4_0_sw_init(void *handle)
176176 AMDGPU_DRM_KEY_INJECT_WORKAROUND_VCNFW_ASD_HANDSHAKING ;
177177 }
178178
179- if (amdgpu_sriov_vf (adev ))
180- fw_shared -> present_flag_0 |= cpu_to_le32 (AMDGPU_VCN_VF_RB_SETUP_FLAG );
181-
182179 if (amdgpu_vcnfw_log )
183180 amdgpu_vcn_fwlog_init (& adev -> vcn .inst [i ]);
184181 }
@@ -1209,6 +1206,24 @@ static int vcn_v4_0_start(struct amdgpu_device *adev)
12091206 return 0 ;
12101207}
12111208
1209+ static int vcn_v4_0_init_ring_metadata (struct amdgpu_device * adev , uint32_t vcn_inst , struct amdgpu_ring * ring_enc )
1210+ {
1211+ struct amdgpu_vcn_rb_metadata * rb_metadata = NULL ;
1212+ uint8_t * rb_ptr = (uint8_t * )ring_enc -> ring ;
1213+
1214+ rb_ptr += ring_enc -> ring_size ;
1215+ rb_metadata = (struct amdgpu_vcn_rb_metadata * )rb_ptr ;
1216+
1217+ memset (rb_metadata , 0 , sizeof (struct amdgpu_vcn_rb_metadata ));
1218+ rb_metadata -> size = sizeof (struct amdgpu_vcn_rb_metadata );
1219+ rb_metadata -> present_flag_0 |= cpu_to_le32 (AMDGPU_VCN_VF_RB_SETUP_FLAG );
1220+ rb_metadata -> present_flag_0 |= cpu_to_le32 (AMDGPU_VCN_VF_RB_DECOUPLE_FLAG );
1221+ rb_metadata -> version = 1 ;
1222+ rb_metadata -> ring_id = vcn_inst & 0xFF ;
1223+
1224+ return 0 ;
1225+ }
1226+
12121227static int vcn_v4_0_start_sriov (struct amdgpu_device * adev )
12131228{
12141229 int i ;
@@ -1331,11 +1346,30 @@ static int vcn_v4_0_start_sriov(struct amdgpu_device *adev)
13311346 rb_enc_addr = ring_enc -> gpu_addr ;
13321347
13331348 rb_setup -> is_rb_enabled_flags |= RB_ENABLED ;
1334- rb_setup -> rb_addr_lo = lower_32_bits (rb_enc_addr );
1335- rb_setup -> rb_addr_hi = upper_32_bits (rb_enc_addr );
1336- rb_setup -> rb_size = ring_enc -> ring_size / 4 ;
13371349 fw_shared -> present_flag_0 |= cpu_to_le32 (AMDGPU_VCN_VF_RB_SETUP_FLAG );
13381350
1351+ if (amdgpu_sriov_is_vcn_rb_decouple (adev )) {
1352+ vcn_v4_0_init_ring_metadata (adev , i , ring_enc );
1353+
1354+ memset ((void * )& rb_setup -> rb_info , 0 , sizeof (struct amdgpu_vcn_rb_setup_info ) * MAX_NUM_VCN_RB_SETUP );
1355+ if (!(adev -> vcn .harvest_config & (1 << 0 ))) {
1356+ rb_setup -> rb_info [0 ].rb_addr_lo = lower_32_bits (adev -> vcn .inst [0 ].ring_enc [0 ].gpu_addr );
1357+ rb_setup -> rb_info [0 ].rb_addr_hi = upper_32_bits (adev -> vcn .inst [0 ].ring_enc [0 ].gpu_addr );
1358+ rb_setup -> rb_info [0 ].rb_size = adev -> vcn .inst [0 ].ring_enc [0 ].ring_size / 4 ;
1359+ }
1360+ if (!(adev -> vcn .harvest_config & (1 << 1 ))) {
1361+ rb_setup -> rb_info [2 ].rb_addr_lo = lower_32_bits (adev -> vcn .inst [1 ].ring_enc [0 ].gpu_addr );
1362+ rb_setup -> rb_info [2 ].rb_addr_hi = upper_32_bits (adev -> vcn .inst [1 ].ring_enc [0 ].gpu_addr );
1363+ rb_setup -> rb_info [2 ].rb_size = adev -> vcn .inst [1 ].ring_enc [0 ].ring_size / 4 ;
1364+ }
1365+ fw_shared -> decouple .is_enabled = 1 ;
1366+ fw_shared -> present_flag_0 |= cpu_to_le32 (AMDGPU_VCN_VF_RB_DECOUPLE_FLAG );
1367+ } else {
1368+ rb_setup -> rb_addr_lo = lower_32_bits (rb_enc_addr );
1369+ rb_setup -> rb_addr_hi = upper_32_bits (rb_enc_addr );
1370+ rb_setup -> rb_size = ring_enc -> ring_size / 4 ;
1371+ }
1372+
13391373 MMSCH_V4_0_INSERT_DIRECT_WT (SOC15_REG_OFFSET (VCN , i ,
13401374 regUVD_LMI_VCPU_NC0_64BIT_BAR_LOW ),
13411375 lower_32_bits (adev -> vcn .inst [i ].fw_shared .gpu_addr ));
@@ -1807,6 +1841,7 @@ static struct amdgpu_ring_funcs vcn_v4_0_unified_ring_vm_funcs = {
18071841 .type = AMDGPU_RING_TYPE_VCN_ENC ,
18081842 .align_mask = 0x3f ,
18091843 .nop = VCN_ENC_CMD_NO_OP ,
1844+ .extra_dw = sizeof (struct amdgpu_vcn_rb_metadata ),
18101845 .get_rptr = vcn_v4_0_unified_ring_get_rptr ,
18111846 .get_wptr = vcn_v4_0_unified_ring_get_wptr ,
18121847 .set_wptr = vcn_v4_0_unified_ring_set_wptr ,
@@ -2020,16 +2055,20 @@ static int vcn_v4_0_process_interrupt(struct amdgpu_device *adev, struct amdgpu_
20202055{
20212056 uint32_t ip_instance ;
20222057
2023- switch (entry -> client_id ) {
2024- case SOC15_IH_CLIENTID_VCN :
2025- ip_instance = 0 ;
2026- break ;
2027- case SOC15_IH_CLIENTID_VCN1 :
2028- ip_instance = 1 ;
2029- break ;
2030- default :
2031- DRM_ERROR ("Unhandled client id: %d\n" , entry -> client_id );
2032- return 0 ;
2058+ if (amdgpu_sriov_is_vcn_rb_decouple (adev )) {
2059+ ip_instance = entry -> ring_id ;
2060+ } else {
2061+ switch (entry -> client_id ) {
2062+ case SOC15_IH_CLIENTID_VCN :
2063+ ip_instance = 0 ;
2064+ break ;
2065+ case SOC15_IH_CLIENTID_VCN1 :
2066+ ip_instance = 1 ;
2067+ break ;
2068+ default :
2069+ DRM_ERROR ("Unhandled client id: %d\n" , entry -> client_id );
2070+ return 0 ;
2071+ }
20332072 }
20342073
20352074 DRM_DEBUG ("IH: VCN TRAP\n" );
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