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drm/amd/display: [FW Promotion] Release 0.0.71
- Introduce CMD for EDID CEA block parsing - Add SCR5 definition for reporting eDP power sequencer status Signed-off-by: Anthony Koo <Anthony.Koo@amd.com> Acked-by: Bindu Ramamurthy <bindu.r@amd.com> Tested-by: Daniel Wheeler <daniel.wheeler@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
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Lines changed: 88 additions & 2 deletions

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drivers/gpu/drm/amd/display/dmub/inc/dmub_cmd.h

Lines changed: 88 additions & 2 deletions
Original file line numberDiff line numberDiff line change
@@ -47,10 +47,10 @@
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/* Firmware versioning. */
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#ifdef DMUB_EXPOSE_VERSION
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#define DMUB_FW_VERSION_GIT_HASH 0x5cac099d3
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#define DMUB_FW_VERSION_GIT_HASH 0xf3da2b656
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#define DMUB_FW_VERSION_MAJOR 0
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#define DMUB_FW_VERSION_MINOR 0
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#define DMUB_FW_VERSION_REVISION 70
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#define DMUB_FW_VERSION_REVISION 71
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#define DMUB_FW_VERSION_TEST 0
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#define DMUB_FW_VERSION_VBIOS 0
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#define DMUB_FW_VERSION_HOTFIX 0
@@ -309,6 +309,7 @@ struct dmcub_trace_buf_entry {
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* Current scratch register usage is as follows:
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*
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* SCRATCH0: FW Boot Status register
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* SCRATCH5: LVTMA Status Register
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* SCRATCH15: FW Boot Options register
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*/
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@@ -335,6 +336,21 @@ enum dmub_fw_boot_status_bit {
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DMUB_FW_BOOT_STATUS_BIT_RESTORE_REQUIRED = (1 << 3), /**< 1 if driver should call restore */
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};
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/* Register bit definition for SCRATCH5 */
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union dmub_lvtma_status {
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struct {
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uint32_t psp_ok : 1;
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uint32_t edp_on : 1;
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uint32_t reserved : 30;
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} bits;
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uint32_t all;
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};
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enum dmub_lvtma_status_bit {
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DMUB_LVTMA_STATUS_BIT_PSP_OK = (1 << 0),
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DMUB_LVTMA_STATUS_BIT_EDP_ON = (1 << 1),
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};
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/**
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* union dmub_fw_boot_options - Boot option definitions for SCRATCH15
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*/
@@ -629,6 +645,10 @@ enum dmub_cmd_type {
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*/
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DMUB_CMD__PANEL_CNTL = 74,
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#endif
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/**
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* Command type used for EDID CEA parsing
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*/
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DMUB_CMD__EDID_CEA = 79,
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/**
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* Command type used for all VBIOS interface commands.
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*/
@@ -2152,6 +2172,68 @@ struct dmub_rb_cmd_lvtma_control {
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struct dmub_cmd_lvtma_control_data data;
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};
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/**
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* Maximum number of bytes a chunk sent to DMUB for parsing
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*/
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#define DMUB_EDID_CEA_DATA_CHUNK_BYTES 8
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/**
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* Represent a chunk of CEA blocks sent to DMUB for parsing
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*/
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struct dmub_cmd_send_edid_cea {
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uint16_t offset; /**< offset into the CEA block */
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uint8_t length; /**< number of bytes in payload to copy as part of CEA block */
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uint16_t total_length; /**< total length of the CEA block */
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uint8_t payload[DMUB_EDID_CEA_DATA_CHUNK_BYTES]; /**< data chunk of the CEA block */
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uint8_t pad[3]; /**< padding and for future expansion */
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};
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/**
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* Result of VSDB parsing from CEA block
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*/
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struct dmub_cmd_edid_cea_amd_vsdb {
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uint8_t vsdb_found; /**< 1 if parsing has found valid AMD VSDB */
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uint8_t freesync_supported; /**< 1 if Freesync is supported */
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uint16_t amd_vsdb_version; /**< AMD VSDB version */
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uint16_t min_frame_rate; /**< Maximum frame rate */
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uint16_t max_frame_rate; /**< Minimum frame rate */
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};
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/**
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* Result of sending a CEA chunk
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*/
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struct dmub_cmd_edid_cea_ack {
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uint16_t offset; /**< offset of the chunk into the CEA block */
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uint8_t success; /**< 1 if this sending of chunk succeeded */
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uint8_t pad; /**< padding and for future expansion */
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};
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/**
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* Specify whether the result is an ACK/NACK or the parsing has finished
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*/
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enum dmub_cmd_edid_cea_reply_type {
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DMUB_CMD__EDID_CEA_AMD_VSDB = 1, /**< VSDB parsing has finished */
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DMUB_CMD__EDID_CEA_ACK = 2, /**< acknowledges the CEA sending is OK or failing */
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};
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/**
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* Definition of a DMUB_CMD__EDID_CEA command.
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*/
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struct dmub_rb_cmd_edid_cea {
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struct dmub_cmd_header header; /**< Command header */
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union dmub_cmd_edid_cea_data {
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struct dmub_cmd_send_edid_cea input; /**< input to send CEA chunks */
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struct dmub_cmd_edid_cea_output { /**< output with results */
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uint8_t type; /**< dmub_cmd_edid_cea_reply_type */
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union {
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struct dmub_cmd_edid_cea_amd_vsdb amd_vsdb;
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struct dmub_cmd_edid_cea_ack ack;
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};
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} output; /**< output to retrieve ACK/NACK or VSDB parsing results */
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} data; /**< Command data */
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};
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/**
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* union dmub_rb_cmd - DMUB inbox command.
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*/
@@ -2290,6 +2372,10 @@ union dmub_rb_cmd {
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* Definition of a DMUB_CMD__VBIOS_LVTMA_CONTROL command.
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*/
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struct dmub_rb_cmd_lvtma_control lvtma_control;
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/**
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* Definition of a DMUB_CMD__EDID_CEA command.
2377+
*/
2378+
struct dmub_rb_cmd_edid_cea edid_cea;
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};
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/**

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