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oupton
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KVM: selftests: Fix GUEST_PRINTF() format warnings in ARM code
Fix a pile of -Wformat warnings in the KVM ARM selftests code, almost all of which are benign "long" versus "long long" issues (selftests are 64-bit only, and the guest printf code treats "ll" the same as "l"). The code itself isn't problematic, but the warnings make it impossible to build ARM selftests with -Werror, which does detect real issues from time to time. Opportunistically have GUEST_ASSERT_BITMAP_REG() interpret set_expected, which is a bool, as an unsigned decimal value, i.e. have it print '0' or '1' instead of '0x0' or '0x1'. Signed-off-by: Sean Christopherson <seanjc@google.com> Tested-by: Zenghui Yu <yuzenghui@huawei.com> Link: https://lore.kernel.org/r/20240202234603.366925-1-seanjc@google.com Signed-off-by: Oliver Upton <oliver.upton@linux.dev>
1 parent a02395d commit 06fdd89

5 files changed

Lines changed: 12 additions & 12 deletions

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‎tools/testing/selftests/kvm/aarch64/arch_timer.c‎

Lines changed: 2 additions & 2 deletions
Original file line numberDiff line numberDiff line change
@@ -158,9 +158,9 @@ static void guest_validate_irq(unsigned int intid,
158158

159159
/* Basic 'timer condition met' check */
160160
__GUEST_ASSERT(xcnt >= cval,
161-
"xcnt = 0x%llx, cval = 0x%llx, xcnt_diff_us = 0x%llx",
161+
"xcnt = 0x%lx, cval = 0x%lx, xcnt_diff_us = 0x%lx",
162162
xcnt, cval, xcnt_diff_us);
163-
__GUEST_ASSERT(xctl & CTL_ISTATUS, "xcnt = 0x%llx", xcnt);
163+
__GUEST_ASSERT(xctl & CTL_ISTATUS, "xcnt = 0x%lx", xcnt);
164164

165165
WRITE_ONCE(shared_data->nr_iter, shared_data->nr_iter + 1);
166166
}

‎tools/testing/selftests/kvm/aarch64/debug-exceptions.c‎

Lines changed: 1 addition & 1 deletion
Original file line numberDiff line numberDiff line change
@@ -365,7 +365,7 @@ static void guest_wp_handler(struct ex_regs *regs)
365365

366366
static void guest_ss_handler(struct ex_regs *regs)
367367
{
368-
__GUEST_ASSERT(ss_idx < 4, "Expected index < 4, got '%u'", ss_idx);
368+
__GUEST_ASSERT(ss_idx < 4, "Expected index < 4, got '%lu'", ss_idx);
369369
ss_addr[ss_idx++] = regs->pc;
370370
regs->pstate |= SPSR_SS;
371371
}

‎tools/testing/selftests/kvm/aarch64/hypercalls.c‎

Lines changed: 2 additions & 2 deletions
Original file line numberDiff line numberDiff line change
@@ -105,12 +105,12 @@ static void guest_test_hvc(const struct test_hvc_info *hc_info)
105105
case TEST_STAGE_HVC_IFACE_FEAT_DISABLED:
106106
case TEST_STAGE_HVC_IFACE_FALSE_INFO:
107107
__GUEST_ASSERT(res.a0 == SMCCC_RET_NOT_SUPPORTED,
108-
"a0 = 0x%lx, func_id = 0x%x, arg1 = 0x%llx, stage = %u",
108+
"a0 = 0x%lx, func_id = 0x%x, arg1 = 0x%lx, stage = %u",
109109
res.a0, hc_info->func_id, hc_info->arg1, stage);
110110
break;
111111
case TEST_STAGE_HVC_IFACE_FEAT_ENABLED:
112112
__GUEST_ASSERT(res.a0 != SMCCC_RET_NOT_SUPPORTED,
113-
"a0 = 0x%lx, func_id = 0x%x, arg1 = 0x%llx, stage = %u",
113+
"a0 = 0x%lx, func_id = 0x%x, arg1 = 0x%lx, stage = %u",
114114
res.a0, hc_info->func_id, hc_info->arg1, stage);
115115
break;
116116
default:

‎tools/testing/selftests/kvm/aarch64/page_fault_test.c‎

Lines changed: 1 addition & 1 deletion
Original file line numberDiff line numberDiff line change
@@ -292,7 +292,7 @@ static void guest_code(struct test_desc *test)
292292

293293
static void no_dabt_handler(struct ex_regs *regs)
294294
{
295-
GUEST_FAIL("Unexpected dabt, far_el1 = 0x%llx", read_sysreg(far_el1));
295+
GUEST_FAIL("Unexpected dabt, far_el1 = 0x%lx", read_sysreg(far_el1));
296296
}
297297

298298
static void no_iabt_handler(struct ex_regs *regs)

‎tools/testing/selftests/kvm/aarch64/vpmu_counter_access.c‎

Lines changed: 6 additions & 6 deletions
Original file line numberDiff line numberDiff line change
@@ -195,11 +195,11 @@ struct pmc_accessor pmc_accessors[] = {
195195
\
196196
if (set_expected) \
197197
__GUEST_ASSERT((_tval & mask), \
198-
"tval: 0x%lx; mask: 0x%lx; set_expected: 0x%lx", \
198+
"tval: 0x%lx; mask: 0x%lx; set_expected: %u", \
199199
_tval, mask, set_expected); \
200200
else \
201201
__GUEST_ASSERT(!(_tval & mask), \
202-
"tval: 0x%lx; mask: 0x%lx; set_expected: 0x%lx", \
202+
"tval: 0x%lx; mask: 0x%lx; set_expected: %u", \
203203
_tval, mask, set_expected); \
204204
}
205205

@@ -286,7 +286,7 @@ static void test_access_pmc_regs(struct pmc_accessor *acc, int pmc_idx)
286286
acc->write_typer(pmc_idx, write_data);
287287
read_data = acc->read_typer(pmc_idx);
288288
__GUEST_ASSERT(read_data == write_data,
289-
"pmc_idx: 0x%lx; acc_idx: 0x%lx; read_data: 0x%lx; write_data: 0x%lx",
289+
"pmc_idx: 0x%x; acc_idx: 0x%lx; read_data: 0x%lx; write_data: 0x%lx",
290290
pmc_idx, PMC_ACC_TO_IDX(acc), read_data, write_data);
291291

292292
/*
@@ -297,14 +297,14 @@ static void test_access_pmc_regs(struct pmc_accessor *acc, int pmc_idx)
297297

298298
/* The count value must be 0, as it is disabled and reset */
299299
__GUEST_ASSERT(read_data == 0,
300-
"pmc_idx: 0x%lx; acc_idx: 0x%lx; read_data: 0x%lx",
300+
"pmc_idx: 0x%x; acc_idx: 0x%lx; read_data: 0x%lx",
301301
pmc_idx, PMC_ACC_TO_IDX(acc), read_data);
302302

303303
write_data = read_data + pmc_idx + 0x12345;
304304
acc->write_cntr(pmc_idx, write_data);
305305
read_data = acc->read_cntr(pmc_idx);
306306
__GUEST_ASSERT(read_data == write_data,
307-
"pmc_idx: 0x%lx; acc_idx: 0x%lx; read_data: 0x%lx; write_data: 0x%lx",
307+
"pmc_idx: 0x%x; acc_idx: 0x%lx; read_data: 0x%lx; write_data: 0x%lx",
308308
pmc_idx, PMC_ACC_TO_IDX(acc), read_data, write_data);
309309
}
310310

@@ -379,7 +379,7 @@ static void guest_code(uint64_t expected_pmcr_n)
379379
int i, pmc;
380380

381381
__GUEST_ASSERT(expected_pmcr_n <= ARMV8_PMU_MAX_GENERAL_COUNTERS,
382-
"Expected PMCR.N: 0x%lx; ARMv8 general counters: 0x%lx",
382+
"Expected PMCR.N: 0x%lx; ARMv8 general counters: 0x%x",
383383
expected_pmcr_n, ARMV8_PMU_MAX_GENERAL_COUNTERS);
384384

385385
pmcr = read_sysreg(pmcr_el0);

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