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alexdeucheralexdeucher
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drm/amdgpu/pm: fix powerplay OD interface
The overclocking interface currently appends data to a string. Revert back to using sprintf(). Bug: https://gitlab.freedesktop.org/drm/amd/-/issues/1774 Fixes: 6db0c87 ("amdgpu/pm: Replace hwmgr smu usage of sprintf with sysfs_emit") Acked-by: Evan Quan <evan.quan@amd.com> Acked-by: Christian König <christian.koenig@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
1 parent 6ff5349 commit 081664e

6 files changed

Lines changed: 67 additions & 79 deletions

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‎drivers/gpu/drm/amd/pm/powerplay/hwmgr/smu10_hwmgr.c‎

Lines changed: 9 additions & 11 deletions
Original file line numberDiff line numberDiff line change
@@ -1024,8 +1024,6 @@ static int smu10_print_clock_levels(struct pp_hwmgr *hwmgr,
10241024
uint32_t min_freq, max_freq = 0;
10251025
uint32_t ret = 0;
10261026

1027-
phm_get_sysfs_buf(&buf, &size);
1028-
10291027
switch (type) {
10301028
case PP_SCLK:
10311029
smum_send_msg_to_smc(hwmgr, PPSMC_MSG_GetGfxclkFrequency, &now);
@@ -1038,21 +1036,21 @@ static int smu10_print_clock_levels(struct pp_hwmgr *hwmgr,
10381036
else
10391037
i = 1;
10401038

1041-
size += sysfs_emit_at(buf, size, "0: %uMhz %s\n",
1039+
size += sprintf(buf + size, "0: %uMhz %s\n",
10421040
data->gfx_min_freq_limit/100,
10431041
i == 0 ? "*" : "");
1044-
size += sysfs_emit_at(buf, size, "1: %uMhz %s\n",
1042+
size += sprintf(buf + size, "1: %uMhz %s\n",
10451043
i == 1 ? now : SMU10_UMD_PSTATE_GFXCLK,
10461044
i == 1 ? "*" : "");
1047-
size += sysfs_emit_at(buf, size, "2: %uMhz %s\n",
1045+
size += sprintf(buf + size, "2: %uMhz %s\n",
10481046
data->gfx_max_freq_limit/100,
10491047
i == 2 ? "*" : "");
10501048
break;
10511049
case PP_MCLK:
10521050
smum_send_msg_to_smc(hwmgr, PPSMC_MSG_GetFclkFrequency, &now);
10531051

10541052
for (i = 0; i < mclk_table->count; i++)
1055-
size += sysfs_emit_at(buf, size, "%d: %uMhz %s\n",
1053+
size += sprintf(buf + size, "%d: %uMhz %s\n",
10561054
i,
10571055
mclk_table->entries[i].clk / 100,
10581056
((mclk_table->entries[i].clk / 100)
@@ -1067,10 +1065,10 @@ static int smu10_print_clock_levels(struct pp_hwmgr *hwmgr,
10671065
if (ret)
10681066
return ret;
10691067

1070-
size += sysfs_emit_at(buf, size, "%s:\n", "OD_SCLK");
1071-
size += sysfs_emit_at(buf, size, "0: %10uMhz\n",
1068+
size += sprintf(buf + size, "%s:\n", "OD_SCLK");
1069+
size += sprintf(buf + size, "0: %10uMhz\n",
10721070
(data->gfx_actual_soft_min_freq > 0) ? data->gfx_actual_soft_min_freq : min_freq);
1073-
size += sysfs_emit_at(buf, size, "1: %10uMhz\n",
1071+
size += sprintf(buf + size, "1: %10uMhz\n",
10741072
(data->gfx_actual_soft_max_freq > 0) ? data->gfx_actual_soft_max_freq : max_freq);
10751073
}
10761074
break;
@@ -1083,8 +1081,8 @@ static int smu10_print_clock_levels(struct pp_hwmgr *hwmgr,
10831081
if (ret)
10841082
return ret;
10851083

1086-
size += sysfs_emit_at(buf, size, "%s:\n", "OD_RANGE");
1087-
size += sysfs_emit_at(buf, size, "SCLK: %7uMHz %10uMHz\n",
1084+
size += sprintf(buf + size, "%s:\n", "OD_RANGE");
1085+
size += sprintf(buf + size, "SCLK: %7uMHz %10uMHz\n",
10881086
min_freq, max_freq);
10891087
}
10901088
break;

‎drivers/gpu/drm/amd/pm/powerplay/hwmgr/smu7_hwmgr.c‎

Lines changed: 11 additions & 13 deletions
Original file line numberDiff line numberDiff line change
@@ -4914,8 +4914,6 @@ static int smu7_print_clock_levels(struct pp_hwmgr *hwmgr,
49144914
int size = 0;
49154915
uint32_t i, now, clock, pcie_speed;
49164916

4917-
phm_get_sysfs_buf(&buf, &size);
4918-
49194917
switch (type) {
49204918
case PP_SCLK:
49214919
smum_send_msg_to_smc(hwmgr, PPSMC_MSG_API_GetSclkFrequency, &clock);
@@ -4928,7 +4926,7 @@ static int smu7_print_clock_levels(struct pp_hwmgr *hwmgr,
49284926
now = i;
49294927

49304928
for (i = 0; i < sclk_table->count; i++)
4931-
size += sysfs_emit_at(buf, size, "%d: %uMhz %s\n",
4929+
size += sprintf(buf + size, "%d: %uMhz %s\n",
49324930
i, sclk_table->dpm_levels[i].value / 100,
49334931
(i == now) ? "*" : "");
49344932
break;
@@ -4943,7 +4941,7 @@ static int smu7_print_clock_levels(struct pp_hwmgr *hwmgr,
49434941
now = i;
49444942

49454943
for (i = 0; i < mclk_table->count; i++)
4946-
size += sysfs_emit_at(buf, size, "%d: %uMhz %s\n",
4944+
size += sprintf(buf + size, "%d: %uMhz %s\n",
49474945
i, mclk_table->dpm_levels[i].value / 100,
49484946
(i == now) ? "*" : "");
49494947
break;
@@ -4957,40 +4955,40 @@ static int smu7_print_clock_levels(struct pp_hwmgr *hwmgr,
49574955
now = i;
49584956

49594957
for (i = 0; i < pcie_table->count; i++)
4960-
size += sysfs_emit_at(buf, size, "%d: %s %s\n", i,
4958+
size += sprintf(buf + size, "%d: %s %s\n", i,
49614959
(pcie_table->dpm_levels[i].value == 0) ? "2.5GT/s, x8" :
49624960
(pcie_table->dpm_levels[i].value == 1) ? "5.0GT/s, x16" :
49634961
(pcie_table->dpm_levels[i].value == 2) ? "8.0GT/s, x16" : "",
49644962
(i == now) ? "*" : "");
49654963
break;
49664964
case OD_SCLK:
49674965
if (hwmgr->od_enabled) {
4968-
size += sysfs_emit_at(buf, size, "%s:\n", "OD_SCLK");
4966+
size += sprintf(buf + size, "%s:\n", "OD_SCLK");
49694967
for (i = 0; i < odn_sclk_table->num_of_pl; i++)
4970-
size += sysfs_emit_at(buf, size, "%d: %10uMHz %10umV\n",
4968+
size += sprintf(buf + size, "%d: %10uMHz %10umV\n",
49714969
i, odn_sclk_table->entries[i].clock/100,
49724970
odn_sclk_table->entries[i].vddc);
49734971
}
49744972
break;
49754973
case OD_MCLK:
49764974
if (hwmgr->od_enabled) {
4977-
size += sysfs_emit_at(buf, size, "%s:\n", "OD_MCLK");
4975+
size += sprintf(buf + size, "%s:\n", "OD_MCLK");
49784976
for (i = 0; i < odn_mclk_table->num_of_pl; i++)
4979-
size += sysfs_emit_at(buf, size, "%d: %10uMHz %10umV\n",
4977+
size += sprintf(buf + size, "%d: %10uMHz %10umV\n",
49804978
i, odn_mclk_table->entries[i].clock/100,
49814979
odn_mclk_table->entries[i].vddc);
49824980
}
49834981
break;
49844982
case OD_RANGE:
49854983
if (hwmgr->od_enabled) {
4986-
size += sysfs_emit_at(buf, size, "%s:\n", "OD_RANGE");
4987-
size += sysfs_emit_at(buf, size, "SCLK: %7uMHz %10uMHz\n",
4984+
size += sprintf(buf + size, "%s:\n", "OD_RANGE");
4985+
size += sprintf(buf + size, "SCLK: %7uMHz %10uMHz\n",
49884986
data->golden_dpm_table.sclk_table.dpm_levels[0].value/100,
49894987
hwmgr->platform_descriptor.overdriveLimit.engineClock/100);
4990-
size += sysfs_emit_at(buf, size, "MCLK: %7uMHz %10uMHz\n",
4988+
size += sprintf(buf + size, "MCLK: %7uMHz %10uMHz\n",
49914989
data->golden_dpm_table.mclk_table.dpm_levels[0].value/100,
49924990
hwmgr->platform_descriptor.overdriveLimit.memoryClock/100);
4993-
size += sysfs_emit_at(buf, size, "VDDC: %7umV %11umV\n",
4991+
size += sprintf(buf + size, "VDDC: %7umV %11umV\n",
49944992
data->odn_dpm_table.min_vddc,
49954993
data->odn_dpm_table.max_vddc);
49964994
}

‎drivers/gpu/drm/amd/pm/powerplay/hwmgr/smu8_hwmgr.c‎

Lines changed: 2 additions & 4 deletions
Original file line numberDiff line numberDiff line change
@@ -1550,8 +1550,6 @@ static int smu8_print_clock_levels(struct pp_hwmgr *hwmgr,
15501550
uint32_t i, now;
15511551
int size = 0;
15521552

1553-
phm_get_sysfs_buf(&buf, &size);
1554-
15551553
switch (type) {
15561554
case PP_SCLK:
15571555
now = PHM_GET_FIELD(cgs_read_ind_register(hwmgr->device,
@@ -1561,7 +1559,7 @@ static int smu8_print_clock_levels(struct pp_hwmgr *hwmgr,
15611559
CURR_SCLK_INDEX);
15621560

15631561
for (i = 0; i < sclk_table->count; i++)
1564-
size += sysfs_emit_at(buf, size, "%d: %uMhz %s\n",
1562+
size += sprintf(buf + size, "%d: %uMhz %s\n",
15651563
i, sclk_table->entries[i].clk / 100,
15661564
(i == now) ? "*" : "");
15671565
break;
@@ -1573,7 +1571,7 @@ static int smu8_print_clock_levels(struct pp_hwmgr *hwmgr,
15731571
CURR_MCLK_INDEX);
15741572

15751573
for (i = SMU8_NUM_NBPMEMORYCLOCK; i > 0; i--)
1576-
size += sysfs_emit_at(buf, size, "%d: %uMhz %s\n",
1574+
size += sprintf(buf + size, "%d: %uMhz %s\n",
15771575
SMU8_NUM_NBPMEMORYCLOCK-i, data->sys_info.nbp_memory_clock[i-1] / 100,
15781576
(SMU8_NUM_NBPMEMORYCLOCK-i == now) ? "*" : "");
15791577
break;

‎drivers/gpu/drm/amd/pm/powerplay/hwmgr/vega10_hwmgr.c‎

Lines changed: 13 additions & 15 deletions
Original file line numberDiff line numberDiff line change
@@ -4639,8 +4639,6 @@ static int vega10_print_clock_levels(struct pp_hwmgr *hwmgr,
46394639

46404640
int i, now, size = 0, count = 0;
46414641

4642-
phm_get_sysfs_buf(&buf, &size);
4643-
46444642
switch (type) {
46454643
case PP_SCLK:
46464644
if (data->registry_data.sclk_dpm_key_disabled)
@@ -4654,7 +4652,7 @@ static int vega10_print_clock_levels(struct pp_hwmgr *hwmgr,
46544652
else
46554653
count = sclk_table->count;
46564654
for (i = 0; i < count; i++)
4657-
size += sysfs_emit_at(buf, size, "%d: %uMhz %s\n",
4655+
size += sprintf(buf + size, "%d: %uMhz %s\n",
46584656
i, sclk_table->dpm_levels[i].value / 100,
46594657
(i == now) ? "*" : "");
46604658
break;
@@ -4665,7 +4663,7 @@ static int vega10_print_clock_levels(struct pp_hwmgr *hwmgr,
46654663
smum_send_msg_to_smc(hwmgr, PPSMC_MSG_GetCurrentUclkIndex, &now);
46664664

46674665
for (i = 0; i < mclk_table->count; i++)
4668-
size += sysfs_emit_at(buf, size, "%d: %uMhz %s\n",
4666+
size += sprintf(buf + size, "%d: %uMhz %s\n",
46694667
i, mclk_table->dpm_levels[i].value / 100,
46704668
(i == now) ? "*" : "");
46714669
break;
@@ -4676,7 +4674,7 @@ static int vega10_print_clock_levels(struct pp_hwmgr *hwmgr,
46764674
smum_send_msg_to_smc(hwmgr, PPSMC_MSG_GetCurrentSocclkIndex, &now);
46774675

46784676
for (i = 0; i < soc_table->count; i++)
4679-
size += sysfs_emit_at(buf, size, "%d: %uMhz %s\n",
4677+
size += sprintf(buf + size, "%d: %uMhz %s\n",
46804678
i, soc_table->dpm_levels[i].value / 100,
46814679
(i == now) ? "*" : "");
46824680
break;
@@ -4688,7 +4686,7 @@ static int vega10_print_clock_levels(struct pp_hwmgr *hwmgr,
46884686
PPSMC_MSG_GetClockFreqMHz, CLK_DCEFCLK, &now);
46894687

46904688
for (i = 0; i < dcef_table->count; i++)
4691-
size += sysfs_emit_at(buf, size, "%d: %uMhz %s\n",
4689+
size += sprintf(buf + size, "%d: %uMhz %s\n",
46924690
i, dcef_table->dpm_levels[i].value / 100,
46934691
(dcef_table->dpm_levels[i].value / 100 == now) ?
46944692
"*" : "");
@@ -4702,7 +4700,7 @@ static int vega10_print_clock_levels(struct pp_hwmgr *hwmgr,
47024700
gen_speed = pptable->PcieGenSpeed[i];
47034701
lane_width = pptable->PcieLaneCount[i];
47044702

4705-
size += sysfs_emit_at(buf, size, "%d: %s %s %s\n", i,
4703+
size += sprintf(buf + size, "%d: %s %s %s\n", i,
47064704
(gen_speed == 0) ? "2.5GT/s," :
47074705
(gen_speed == 1) ? "5.0GT/s," :
47084706
(gen_speed == 2) ? "8.0GT/s," :
@@ -4721,34 +4719,34 @@ static int vega10_print_clock_levels(struct pp_hwmgr *hwmgr,
47214719

47224720
case OD_SCLK:
47234721
if (hwmgr->od_enabled) {
4724-
size += sysfs_emit_at(buf, size, "%s:\n", "OD_SCLK");
4722+
size += sprintf(buf + size, "%s:\n", "OD_SCLK");
47254723
podn_vdd_dep = &data->odn_dpm_table.vdd_dep_on_sclk;
47264724
for (i = 0; i < podn_vdd_dep->count; i++)
4727-
size += sysfs_emit_at(buf, size, "%d: %10uMhz %10umV\n",
4725+
size += sprintf(buf + size, "%d: %10uMhz %10umV\n",
47284726
i, podn_vdd_dep->entries[i].clk / 100,
47294727
podn_vdd_dep->entries[i].vddc);
47304728
}
47314729
break;
47324730
case OD_MCLK:
47334731
if (hwmgr->od_enabled) {
4734-
size += sysfs_emit_at(buf, size, "%s:\n", "OD_MCLK");
4732+
size += sprintf(buf + size, "%s:\n", "OD_MCLK");
47354733
podn_vdd_dep = &data->odn_dpm_table.vdd_dep_on_mclk;
47364734
for (i = 0; i < podn_vdd_dep->count; i++)
4737-
size += sysfs_emit_at(buf, size, "%d: %10uMhz %10umV\n",
4735+
size += sprintf(buf + size, "%d: %10uMhz %10umV\n",
47384736
i, podn_vdd_dep->entries[i].clk/100,
47394737
podn_vdd_dep->entries[i].vddc);
47404738
}
47414739
break;
47424740
case OD_RANGE:
47434741
if (hwmgr->od_enabled) {
4744-
size += sysfs_emit_at(buf, size, "%s:\n", "OD_RANGE");
4745-
size += sysfs_emit_at(buf, size, "SCLK: %7uMHz %10uMHz\n",
4742+
size += sprintf(buf + size, "%s:\n", "OD_RANGE");
4743+
size += sprintf(buf + size, "SCLK: %7uMHz %10uMHz\n",
47464744
data->golden_dpm_table.gfx_table.dpm_levels[0].value/100,
47474745
hwmgr->platform_descriptor.overdriveLimit.engineClock/100);
4748-
size += sysfs_emit_at(buf, size, "MCLK: %7uMHz %10uMHz\n",
4746+
size += sprintf(buf + size, "MCLK: %7uMHz %10uMHz\n",
47494747
data->golden_dpm_table.mem_table.dpm_levels[0].value/100,
47504748
hwmgr->platform_descriptor.overdriveLimit.memoryClock/100);
4751-
size += sysfs_emit_at(buf, size, "VDDC: %7umV %11umV\n",
4749+
size += sprintf(buf + size, "VDDC: %7umV %11umV\n",
47524750
data->odn_dpm_table.min_vddc,
47534751
data->odn_dpm_table.max_vddc);
47544752
}

‎drivers/gpu/drm/amd/pm/powerplay/hwmgr/vega12_hwmgr.c‎

Lines changed: 4 additions & 6 deletions
Original file line numberDiff line numberDiff line change
@@ -2246,8 +2246,6 @@ static int vega12_print_clock_levels(struct pp_hwmgr *hwmgr,
22462246
int i, now, size = 0;
22472247
struct pp_clock_levels_with_latency clocks;
22482248

2249-
phm_get_sysfs_buf(&buf, &size);
2250-
22512249
switch (type) {
22522250
case PP_SCLK:
22532251
PP_ASSERT_WITH_CODE(
@@ -2260,7 +2258,7 @@ static int vega12_print_clock_levels(struct pp_hwmgr *hwmgr,
22602258
"Attempt to get gfx clk levels Failed!",
22612259
return -1);
22622260
for (i = 0; i < clocks.num_levels; i++)
2263-
size += sysfs_emit_at(buf, size, "%d: %uMhz %s\n",
2261+
size += sprintf(buf + size, "%d: %uMhz %s\n",
22642262
i, clocks.data[i].clocks_in_khz / 1000,
22652263
(clocks.data[i].clocks_in_khz / 1000 == now / 100) ? "*" : "");
22662264
break;
@@ -2276,7 +2274,7 @@ static int vega12_print_clock_levels(struct pp_hwmgr *hwmgr,
22762274
"Attempt to get memory clk levels Failed!",
22772275
return -1);
22782276
for (i = 0; i < clocks.num_levels; i++)
2279-
size += sysfs_emit_at(buf, size, "%d: %uMhz %s\n",
2277+
size += sprintf(buf + size, "%d: %uMhz %s\n",
22802278
i, clocks.data[i].clocks_in_khz / 1000,
22812279
(clocks.data[i].clocks_in_khz / 1000 == now / 100) ? "*" : "");
22822280
break;
@@ -2294,7 +2292,7 @@ static int vega12_print_clock_levels(struct pp_hwmgr *hwmgr,
22942292
"Attempt to get soc clk levels Failed!",
22952293
return -1);
22962294
for (i = 0; i < clocks.num_levels; i++)
2297-
size += sysfs_emit_at(buf, size, "%d: %uMhz %s\n",
2295+
size += sprintf(buf + size, "%d: %uMhz %s\n",
22982296
i, clocks.data[i].clocks_in_khz / 1000,
22992297
(clocks.data[i].clocks_in_khz / 1000 == now) ? "*" : "");
23002298
break;
@@ -2312,7 +2310,7 @@ static int vega12_print_clock_levels(struct pp_hwmgr *hwmgr,
23122310
"Attempt to get dcef clk levels Failed!",
23132311
return -1);
23142312
for (i = 0; i < clocks.num_levels; i++)
2315-
size += sysfs_emit_at(buf, size, "%d: %uMhz %s\n",
2313+
size += sprintf(buf + size, "%d: %uMhz %s\n",
23162314
i, clocks.data[i].clocks_in_khz / 1000,
23172315
(clocks.data[i].clocks_in_khz / 1000 == now) ? "*" : "");
23182316
break;

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