@@ -126,6 +126,7 @@ struct mtk_iommu_domain {
126126 struct io_pgtable_cfg cfg ;
127127 struct io_pgtable_ops * iop ;
128128
129+ struct mtk_iommu_data * data ;
129130 struct iommu_domain domain ;
130131};
131132
@@ -351,6 +352,7 @@ static int mtk_iommu_domain_finalise(struct mtk_iommu_domain *dom)
351352 return - EINVAL ;
352353 }
353354
355+ dom -> data = data ;
354356 /* Update our support page sizes bitmap */
355357 dom -> domain .pgsize_bitmap = dom -> cfg .pgsize_bitmap ;
356358 return 0 ;
@@ -442,10 +444,9 @@ static int mtk_iommu_map(struct iommu_domain *domain, unsigned long iova,
442444 phys_addr_t paddr , size_t size , int prot , gfp_t gfp )
443445{
444446 struct mtk_iommu_domain * dom = to_mtk_domain (domain );
445- struct mtk_iommu_data * data = mtk_iommu_get_m4u_data ();
446447
447448 /* The "4GB mode" M4U physically can not use the lower remap of Dram. */
448- if (data -> enable_4GB )
449+ if (dom -> data -> enable_4GB )
449450 paddr |= BIT_ULL (32 );
450451
451452 /* Synchronize with the tlb_lock */
@@ -468,36 +469,37 @@ static size_t mtk_iommu_unmap(struct iommu_domain *domain,
468469
469470static void mtk_iommu_flush_iotlb_all (struct iommu_domain * domain )
470471{
471- mtk_iommu_tlb_flush_all (mtk_iommu_get_m4u_data ());
472+ struct mtk_iommu_domain * dom = to_mtk_domain (domain );
473+
474+ mtk_iommu_tlb_flush_all (dom -> data );
472475}
473476
474477static void mtk_iommu_iotlb_sync (struct iommu_domain * domain ,
475478 struct iommu_iotlb_gather * gather )
476479{
477- struct mtk_iommu_data * data = mtk_iommu_get_m4u_data ( );
480+ struct mtk_iommu_domain * dom = to_mtk_domain ( domain );
478481 size_t length = gather -> end - gather -> start + 1 ;
479482
480483 mtk_iommu_tlb_flush_range_sync (gather -> start , length , gather -> pgsize ,
481- data );
484+ dom -> data );
482485}
483486
484487static void mtk_iommu_sync_map (struct iommu_domain * domain , unsigned long iova ,
485488 size_t size )
486489{
487- struct mtk_iommu_data * data = mtk_iommu_get_m4u_data ( );
490+ struct mtk_iommu_domain * dom = to_mtk_domain ( domain );
488491
489- mtk_iommu_tlb_flush_range_sync (iova , size , size , data );
492+ mtk_iommu_tlb_flush_range_sync (iova , size , size , dom -> data );
490493}
491494
492495static phys_addr_t mtk_iommu_iova_to_phys (struct iommu_domain * domain ,
493496 dma_addr_t iova )
494497{
495498 struct mtk_iommu_domain * dom = to_mtk_domain (domain );
496- struct mtk_iommu_data * data = mtk_iommu_get_m4u_data ();
497499 phys_addr_t pa ;
498500
499501 pa = dom -> iop -> iova_to_phys (dom -> iop , iova );
500- if (data -> enable_4GB && pa >= MTK_IOMMU_4GB_MODE_REMAP_BASE )
502+ if (dom -> data -> enable_4GB && pa >= MTK_IOMMU_4GB_MODE_REMAP_BASE )
501503 pa &= ~BIT_ULL (32 );
502504
503505 return pa ;
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