drm/amd/display: Update number of DCN3 clock states

Aurabindo Pillai · alexdeucher · commit 0bbf06d88873 · 2021-08-26T13:57:06.000-04:00
[Why & How] The DCN3 SoC parameter num_states was calculated but not saved into the object. Bug: https://gitlab.freedesktop.org/drm/amd/-/issues/1403 Cc: stable@vger.kernel.org Signed-off-by: Aurabindo Pillai <aurabindo.pillai@amd.com> Acked-by: Alex Deucher <alexander.deucher@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
diff --git a/drivers/gpu/drm/amd/display/dc/dcn30/dcn30_resource.c b/drivers/gpu/drm/amd/display/dc/dcn30/dcn30_resource.c
@@ -2467,6 +2467,7 @@ void dcn30_update_bw_bounding_box(struct dc *dc, struct clk_bw_params *bw_params
 			dram_speed_mts[num_states++] = bw_params->clk_table.entries[j++].memclk_mhz * 16;
 		}
 
+		dcn3_0_soc.num_states = num_states;
 		for (i = 0; i < dcn3_0_soc.num_states; i++) {
 			dcn3_0_soc.clock_limits[i].state = i;
 			dcn3_0_soc.clock_limits[i].dcfclk_mhz = dcfclk_mhz[i];

Original file line number	Diff line number	Diff line change
`@@ -2467,6 +2467,7 @@ void dcn30_update_bw_bounding_box(struct dc dc, struct clk_bw_params bw_params`
`2467`	`2467`	`dram_speed_mts[num_states++] = bw_params->clk_table.entries[j++].memclk_mhz * 16;`
`2468`	`2468`	`}`
`2469`	`2469`
	`2470`	`+ dcn3_0_soc.num_states = num_states;`
`2470`	`2471`	`for (i = 0; i < dcn3_0_soc.num_states; i++) {`
`2471`	`2472`	`dcn3_0_soc.clock_limits[i].state = i;`
`2472`	`2473`	`dcn3_0_soc.clock_limits[i].dcfclk_mhz = dcfclk_mhz[i];`