Merge tag 'stm32-dt-for-v6.7-1' of git://git.kernel.org/pub/scm/linux/kernel/git/atorgue/stm32 into soc/dt

STM32 DT for v6.7, round 1

Highlights:
----------

- MCU:
  - Add SDIO  sleep pins for F7 boards.

- MPU:
  - STM32MP13:
    - Add HASH and RNG support.

  - STMP32MP15:
    - OCTAVO:
      - Fix regulators (LDO1/2/6 and 3v3_hdmi) by removing "always-on"
        property on OSD32 common file.
      - Add new OS32MP1-RED board. It embeds a STM32157C SoC,
        512 MB of DDR3, CAN-FD, HDMI, USB-C OTG.

  - STM32MP25:
    - Add and enable SDCARD support.
    - Add and enable ARM watchdog support and set it to 32 seconds.

* tag 'stm32-dt-for-v6.7-1' of git://git.kernel.org/pub/scm/linux/kernel/git/atorgue/stm32:
  ARM: dts: stm32: add SDIO pinctrl sleep support on stm32f7 boards
  ARM: dts: stm32: add stm32f7 SDIO sleep pins
  ARM: dts: stm32: add RNG node for STM32MP13x platforms
  ARM: dts: stm32: omit unused pinctrl groups from stm32mp15 dtb files
  ARM: dts: stm32: stm32f7-pinctrl: don't use multiple blank lines
  ARM: dts: stm32: add HASH on stm32mp131
  arm64: dts: st: enable secure arm-wdt watchdog on stm32mp257f-ev1
  arm64: dts: st: add arm-wdt node for watchdog support on stm32mp251
  arm64: dts: st: add SD-card support on STM32MP257F-EV1 board
  arm64: dts: st: add sdmmc1 pins for stm32mp25
  arm64: dts: st: add sdmmc1 node in stm32mp251 SoC file
  ARM: dts: stm32: Add Octavo OSD32MP1-RED board
  dt-bindings: arm: stm32: add extra SiP compatible for oct,stm32mp157c-osd32-red
  ARM: dts: stm32: osd32: fix ldo6 not required to be always-on
  ARM: dts: stm32: lxa-tac: remove v3v3_hdmi override
  ARM: dts: stm32: osd32: fix ldo2 not required to be always-on
  ARM: dts: stm32: osd32: fix ldo1 not required to be always-on
  ARM: dts: stm32: Add alternate pinmux for can pins
  ARM: dts: stm32: Add alternate pinmux for ldtc pins
  ARM: dts: stm32: Add alternate pinmux for i2s pins

Link: https://lore.kernel.org/r/8a6b3ca9-f10d-825e-e371-8aeff3289a25@foss.st.com
Signed-off-by: Arnd Bergmann <arnd@arndb.de>

Author: arndb

Documentation/devicetree/bindings/arm/stm32/stm32.yaml

@@ -146,6 +146,7 @@ properties:
               - lxa,stm32mp157c-mc1      # Linux Automation MC-1
               - lxa,stm32mp157c-tac-gen1 # Linux Automation TAC (Generation 1)
               - lxa,stm32mp157c-tac-gen2 # Linux Automation TAC (Generation 2)
+              - oct,stm32mp157c-osd32-red # Octavo OSD32MP1 RED board
           - const: oct,stm32mp15xx-osd32
           - enum:
               - st,stm32mp157

arch/arm/boot/dts/st/Makefile

@@ -59,6 +59,7 @@ dtb-$(CONFIG_ARCH_STM32) += \
 	stm32mp157c-lxa-tac-gen1.dtb \
 	stm32mp157c-lxa-tac-gen2.dtb \
 	stm32mp157c-odyssey.dtb \
+	stm32mp157c-osd32mp1-red.dtb \
 	stm32mp157c-phycore-stm32mp1-3.dtb
 dtb-$(CONFIG_ARCH_U8500) += \
 	ste-snowball.dtb \

arch/arm/boot/dts/st/stm32746g-eval.dts

@@ -188,9 +188,10 @@
 	status = "okay";
 	vmmc-supply = <&mmc_vcard>;
 	broken-cd;
-	pinctrl-names = "default", "opendrain";
+	pinctrl-names = "default", "opendrain", "sleep";
 	pinctrl-0 = <&sdio_pins_a>;
 	pinctrl-1 = <&sdio_pins_od_a>;
+	pinctrl-2 = <&sdio_pins_sleep_a>;
 	bus-width = <4>;
 };
 

arch/arm/boot/dts/st/stm32f7-pinctrl.dtsi

@@ -263,6 +263,17 @@
 				};
 			};
 
+			sdio_pins_sleep_a: sdio-pins-sleep-a-0 {
+				pins {
+					pinmux = <STM32_PINMUX('C', 8, ANALOG)>, /* SDMMC1 D0 */
+						 <STM32_PINMUX('C', 9, ANALOG)>, /* SDMMC1 D1 */
+						 <STM32_PINMUX('C', 10, ANALOG)>, /* SDMMC1 D2 */
+						 <STM32_PINMUX('C', 11, ANALOG)>, /* SDMMC1 D3 */
+						 <STM32_PINMUX('C', 12, ANALOG)>, /* SDMMC1 CLK */
+						 <STM32_PINMUX('D', 2, ANALOG)>; /* SDMMC1 CMD */
+				};
+			};
+
 			sdio_pins_b: sdio-pins-b-0 {
 				pins {
 					pinmux = <STM32_PINMUX('G', 9, AF11)>, /* SDMMC2 D0 */
@@ -294,6 +305,17 @@
 				};
 			};
 
+			sdio_pins_sleep_b: sdio-pins-sleep-b-0 {
+				pins {
+					pinmux = <STM32_PINMUX('G', 9, ANALOG)>, /* SDMMC2 D0 */
+						 <STM32_PINMUX('G', 10, ANALOG)>, /* SDMMC2 D1 */
+						 <STM32_PINMUX('B', 3, ANALOG)>, /* SDMMC2 D2 */
+						 <STM32_PINMUX('B', 4, ANALOG)>, /* SDMMC2 D3 */
+						 <STM32_PINMUX('D', 6, ANALOG)>, /* SDMMC2 CLK */
+						 <STM32_PINMUX('D', 7, ANALOG)>; /* SDMMC2 CMD */
+				};
+			};
+
 			can1_pins_a: can1-0 {
 				pins1 {
 					pinmux = <STM32_PINMUX('A', 12, AF9)>; /* CAN1_TX */
@@ -376,7 +398,6 @@
 				};
 			};
 
-
 			ltdc_pins_a: ltdc-0 {
 				pins {
 					pinmux = <STM32_PINMUX('E', 4, AF14)>, /* LCD_B0 */

arch/arm/boot/dts/st/stm32f746-disco.dts

@@ -164,9 +164,10 @@
 	status = "okay";
 	vmmc-supply = <&vcc_3v3>;
 	cd-gpios = <&gpioc 13 GPIO_ACTIVE_LOW>;
-	pinctrl-names = "default", "opendrain";
+	pinctrl-names = "default", "opendrain", "sleep";
 	pinctrl-0 = <&sdio_pins_a>;
 	pinctrl-1 = <&sdio_pins_od_a>;
+	pinctrl-2 = <&sdio_pins_sleep_a>;
 	bus-width = <4>;
 };
 

arch/arm/boot/dts/st/stm32f769-disco.dts

@@ -131,9 +131,10 @@
 	vmmc-supply = <&mmc_vcard>;
 	cd-gpios = <&gpioi 15 GPIO_ACTIVE_LOW>;
 	broken-cd;
-	pinctrl-names = "default", "opendrain";
+	pinctrl-names = "default", "opendrain", "sleep";
 	pinctrl-0 = <&sdio_pins_b>;
 	pinctrl-1 = <&sdio_pins_od_b>;
+	pinctrl-2 = <&sdio_pins_sleep_b>;
 	bus-width = <4>;
 };
 

arch/arm/boot/dts/st/stm32mp131.dtsi

@@ -1210,6 +1210,25 @@
 			};
 		};
 
+		hash: hash@54003000 {
+			compatible = "st,stm32mp13-hash";
+			reg = <0x54003000 0x400>;
+			interrupts = <GIC_SPI 81 IRQ_TYPE_LEVEL_HIGH>;
+			clocks = <&rcc HASH1>;
+			resets = <&rcc HASH1_R>;
+			dmas = <&mdma 30 0x2 0x1000a02 0x0 0x0>;
+			dma-names = "in";
+			status = "disabled";
+		};
+
+		rng: rng@54004000 {
+			compatible = "st,stm32mp13-rng";
+			reg = <0x54004000 0x400>;
+			clocks = <&rcc RNG1_K>;
+			resets = <&rcc RNG1_R>;
+			status = "disabled";
+		};
+
 		mdma: dma-controller@58000000 {
 			compatible = "st,stm32h7-mdma";
 			reg = <0x58000000 0x1000>;