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| 1 | +// SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause) |
| 2 | +/dts-v1/; |
| 3 | + |
| 4 | +/ { |
| 5 | + compatible = "econet,en751221"; |
| 6 | + #address-cells = <1>; |
| 7 | + #size-cells = <1>; |
| 8 | + |
| 9 | + hpt_clock: clock { |
| 10 | + compatible = "fixed-clock"; |
| 11 | + #clock-cells = <0>; |
| 12 | + clock-frequency = <200000000>; /* 200 MHz */ |
| 13 | + }; |
| 14 | + |
| 15 | + cpus: cpus { |
| 16 | + #address-cells = <1>; |
| 17 | + #size-cells = <0>; |
| 18 | + |
| 19 | + cpu@0 { |
| 20 | + device_type = "cpu"; |
| 21 | + compatible = "mips,mips24KEc"; |
| 22 | + reg = <0>; |
| 23 | + }; |
| 24 | + }; |
| 25 | + |
| 26 | + cpuintc: interrupt-controller { |
| 27 | + compatible = "mti,cpu-interrupt-controller"; |
| 28 | + interrupt-controller; |
| 29 | + #address-cells = <0>; |
| 30 | + #interrupt-cells = <1>; |
| 31 | + }; |
| 32 | + |
| 33 | + intc: interrupt-controller@1fb40000 { |
| 34 | + compatible = "econet,en751221-intc"; |
| 35 | + reg = <0x1fb40000 0x100>; |
| 36 | + interrupt-parent = <&cpuintc>; |
| 37 | + interrupts = <2>; |
| 38 | + |
| 39 | + interrupt-controller; |
| 40 | + #interrupt-cells = <1>; |
| 41 | + econet,shadow-interrupts = <7 2>, <8 3>, <13 12>, <30 29>; |
| 42 | + }; |
| 43 | + |
| 44 | + uart: serial@1fbf0000 { |
| 45 | + compatible = "ns16550"; |
| 46 | + reg = <0x1fbf0000 0x30>; |
| 47 | + reg-io-width = <4>; |
| 48 | + reg-shift = <2>; |
| 49 | + interrupt-parent = <&intc>; |
| 50 | + interrupts = <0>; |
| 51 | + /* |
| 52 | + * Conversion of baud rate to clock frequency requires a |
| 53 | + * computation that is not in the ns16550 driver, so this |
| 54 | + * uart is fixed at 115200 baud. |
| 55 | + */ |
| 56 | + clock-frequency = <1843200>; |
| 57 | + }; |
| 58 | + |
| 59 | + timer_hpt: timer@1fbf0400 { |
| 60 | + compatible = "econet,en751221-timer"; |
| 61 | + reg = <0x1fbf0400 0x100>; |
| 62 | + |
| 63 | + interrupt-parent = <&intc>; |
| 64 | + interrupts = <30>; |
| 65 | + clocks = <&hpt_clock>; |
| 66 | + }; |
| 67 | +}; |
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