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mtd: spinand: Octal DTR support
Merge series from Miquel Raynal <miquel.raynal@bootlin.com>: This series adds support for 8D-8D-8D in SPI NAND, which can already be leveraged without any SPI changes as controllers already have this support for some SPI NOR devices. Among the few spi-mem patches, they are needed for building the SPI NAND changes (especially the ODTR introduction at the end) and therefore an immutable tag will be needed for merging in the MTD tree (unless all the series goes through MTD directly ofc).
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Juha Yrjola <juha.yrjola@nokia.com>
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Juha Yrjola <juha.yrjola@solidboot.com>
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Julien Thierry <julien.thierry.kdev@gmail.com> <julien.thierry@arm.com>
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Justin Iurman <justin.iurman@gmail.com> <justin.iurman@uliege.be>
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Iskren Chernev <me@iskren.info> <iskren.chernev@gmail.com>
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Kalle Valo <kvalo@kernel.org> <kvalo@codeaurora.org>
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Kalle Valo <kvalo@kernel.org> <quic_kvalo@quicinc.com>
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Linus Lüssing <linus.luessing@c0d3.blue> <linus.luessing@ascom.ch>
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Linus Lüssing <linus.luessing@c0d3.blue> <linus.luessing@web.de>
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Linus Lüssing <linus.luessing@c0d3.blue> <ll@simonwunderlich.de>
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Linus Walleij <linusw@kernel.org> <linus.walleij@ericsson.com>
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Linus Walleij <linusw@kernel.org> <linus.walleij@stericsson.com>
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Linus Walleij <linusw@kernel.org> <linus.walleij@linaro.org>
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Linus Walleij <linusw@kernel.org> <triad@df.lth.se>
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<linux-hardening@vger.kernel.org> <kernel-hardening@lists.openwall.com>
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Li Yang <leoyang.li@nxp.com> <leoli@freescale.com>
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Li Yang <leoyang.li@nxp.com> <leo@zh-kernel.org>
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Santosh Shilimkar <santosh.shilimkar@oracle.org>
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Santosh Shilimkar <ssantosh@kernel.org>
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Sarangdhar Joshi <spjoshi@codeaurora.org>
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Saravana Kannan <saravanak@kernel.org> <skannan@codeaurora.org>
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Saravana Kannan <saravanak@kernel.org> <saravanak@google.com>
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Sascha Hauer <s.hauer@pengutronix.de>
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Sahitya Tummala <quic_stummala@quicinc.com> <stummala@codeaurora.org>
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Sathishkumar Muruganandam <quic_murugana@quicinc.com> <murugana@codeaurora.org>
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Tejun Heo <htejun@gmail.com>
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Tomeu Vizoso <tomeu@tomeuvizoso.net> <tomeu.vizoso@collabora.com>
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Thomas Graf <tgraf@suug.ch>
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Thomas Gleixner <tglx@kernel.org> <tglx@linutronix.de>
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Thomas Körper <socketcan@esd.eu> <thomas.koerper@esd.eu>
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Thomas Pedersen <twp@codeaurora.org>
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Thorsten Blum <thorsten.blum@linux.dev> <thorsten.blum@toblux.com>

CREDITS

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P: 1024D/8399E1BB 250D 3BCF 7127 0D8C A444 A961 1DBD 5E75 8399 E1BB
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N: Thomas Gleixner
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E: tglx@kernel.org
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D: NAND flash hardware support, JFFS2 on NAND flash
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What: /sys/kernel/time/aux_clocks/<ID>/enable
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Date: May 2025
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Description:
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Controls the enablement of auxiliary clock timekeepers.

Documentation/ABI/testing/sysfs-devices-soc

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Description:
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Read-only attribute common to all SoCs. Contains the SoC machine
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name (e.g. Ux500).
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name (e.g. DB8500).
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What: /sys/devices/socX/family
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Read-only attribute common to all SoCs. Contains SoC family name
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On many of ARM based silicon with SMCCC v1.2+ compliant firmware
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Documentation/arch/x86/topology.rst

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The main aim of the topology facilities is to present adequate interfaces to
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Documentation/core-api/cpu_hotplug.rst

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Introduction
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Documentation/core-api/genericirq.rst

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Documentation/core-api/librs.rst

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Documentation/devicetree/bindings/arm/fsl.yaml

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- gateworks,imx8mp-gw82xx-2x # i.MX8MP Gateworks Board
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Documentation/devicetree/bindings/misc/pci1de4,1.yaml

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