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bjorn-helgaasbjorn-helgaas
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Merge branch 'pci/dt-bindings'
- Update socionext,uniphier-pcie binding pcie_intc name to 'legacy-interrupt-controller' to match .dts files (Rob Herring) - Merge SC8180x binding into SM8150 (Krzysztof Kozlowski) - Move SDX55, SDM845, QCS404, IPQ5018, IPQ6018, IPQ8074 Gen3, IPQ8074, IPQ4019, IPQ9574, APQ8064, MSM8996, APQ8084 to dedicated schema (Krzysztof Kozlowski) - Add MT7981 compatible to mediatek-pcie-gen3 binding (Sjoerd Simons) - Document Loongson msi-parent property (Yao Zi) - Add Glymur compatible to qcom,pcie-x1e80100 binding (Prudhvi Yarlagadda) * pci/dt-bindings: dt-bindings: PCI: qcom: Document the Glymur PCIe Controller dt-bindings: PCI: loongson: Document msi-parent property dt-bindings: PCI: mediatek-gen3: Add MT7981 PCIe compatible dt-bindings: PCI: qcom,pcie-apq8084: Move APQ8084 to dedicated schema dt-bindings: PCI: qcom,pcie-msm8996: Move MSM8996 to dedicated schema dt-bindings: PCI: qcom,pcie-apq8064: Move APQ8064 to dedicated schema dt-bindings: PCI: qcom,pcie-ipq9574: Move IPQ9574 to dedicated schema dt-bindings: PCI: qcom,pcie-ipq4019: Move IPQ4019 to dedicated schema dt-bindings: PCI: qcom,pcie-ipq8074: Move IPQ8074 to dedicated schema dt-bindings: PCI: qcom,pcie-ipq6018: Move IPQ6018 and IPQ8074 Gen3 to dedicated schema dt-bindings: PCI: qcom,pcie-ipq5018: Move IPQ5018 to dedicated schema dt-bindings: PCI: qcom,pcie-qcs404: Move QCS404 to dedicated schema dt-bindings: PCI: qcom,pcie-sdm845: Move SDM845 to dedicated schema dt-bindings: PCI: qcom,pcie-sdx55: Move SDX55 to dedicated schema dt-bindings: PCI: qcom,pcie-sm8150: Merge SC8180x into SM8150 dt-bindings: PCI: socionext,uniphier-pcie: Fix interrupt controller node name
2 parents 0bf9207 + e748870 commit 1097385

18 files changed

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‎Documentation/devicetree/bindings/pci/loongson.yaml‎

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minItems: 1
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maxItems: 3
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msi-parent: true
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required:
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- compatible
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- reg

‎Documentation/devicetree/bindings/pci/mediatek-pcie-gen3.yaml‎

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oneOf:
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- items:
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- enum:
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- mediatek,mt7981-pcie
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- mediatek,mt7986-pcie
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- mediatek,mt8188-pcie
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- mediatek,mt8195-pcie

‎Documentation/devicetree/bindings/pci/qcom,pcie-apq8064.yaml‎

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# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
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%YAML 1.2
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---
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$id: http://devicetree.org/schemas/pci/qcom,pcie-apq8064.yaml#
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$schema: http://devicetree.org/meta-schemas/core.yaml#
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title: Qualcomm APQ8064/IPQ8064 PCI Express Root Complex
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maintainers:
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- Bjorn Andersson <andersson@kernel.org>
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- Manivannan Sadhasivam <mani@kernel.org>
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properties:
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compatible:
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enum:
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- qcom,pcie-apq8064
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- qcom,pcie-ipq8064
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- qcom,pcie-ipq8064-v2
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reg:
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maxItems: 4
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reg-names:
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items:
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- const: dbi
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- const: elbi
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- const: parf
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- const: config
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clocks:
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minItems: 3
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maxItems: 5
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clock-names:
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minItems: 3
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items:
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- const: core # Clocks the pcie hw block
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- const: iface # Configuration AHB clock
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- const: phy
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- const: aux
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- const: ref
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interrupts:
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maxItems: 1
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interrupt-names:
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items:
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- const: msi
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resets:
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minItems: 5
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maxItems: 6
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reset-names:
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minItems: 5
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items:
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- const: axi
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- const: ahb
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- const: por
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- const: pci
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- const: phy
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- const: ext
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vdda-supply:
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description: A phandle to the core analog power supply
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vdda_phy-supply:
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description: A phandle to the core analog power supply for PHY
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vdda_refclk-supply:
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description: A phandle to the core analog power supply for IC which generates reference clock
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required:
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- resets
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- reset-names
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- vdda-supply
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- vdda_phy-supply
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- vdda_refclk-supply
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allOf:
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- $ref: qcom,pcie-common.yaml#
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- if:
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properties:
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compatible:
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contains:
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enum:
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- qcom,pcie-apq8064
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then:
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properties:
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clocks:
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maxItems: 3
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clock-names:
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maxItems: 3
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resets:
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maxItems: 5
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reset-names:
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maxItems: 5
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else:
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properties:
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clocks:
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minItems: 5
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clock-names:
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minItems: 5
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resets:
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minItems: 6
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reset-names:
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minItems: 6
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unevaluatedProperties: false
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examples:
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- |
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#include <dt-bindings/clock/qcom,gcc-msm8960.h>
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#include <dt-bindings/gpio/gpio.h>
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#include <dt-bindings/interrupt-controller/arm-gic.h>
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#include <dt-bindings/reset/qcom,gcc-msm8960.h>
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pcie@1b500000 {
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compatible = "qcom,pcie-apq8064";
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reg = <0x1b500000 0x1000>,
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<0x1b502000 0x80>,
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<0x1b600000 0x100>,
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<0x0ff00000 0x100000>;
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reg-names = "dbi", "elbi", "parf", "config";
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ranges = <0x81000000 0x0 0x00000000 0x0fe00000 0x0 0x00100000>, /* I/O */
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<0x82000000 0x0 0x08000000 0x08000000 0x0 0x07e00000>; /* mem */
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device_type = "pci";
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linux,pci-domain = <0>;
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bus-range = <0x00 0xff>;
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num-lanes = <1>;
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#address-cells = <3>;
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#size-cells = <2>;
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clocks = <&gcc PCIE_A_CLK>,
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<&gcc PCIE_H_CLK>,
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<&gcc PCIE_PHY_REF_CLK>;
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clock-names = "core", "iface", "phy";
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interrupts = <GIC_SPI 238 IRQ_TYPE_LEVEL_HIGH>;
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interrupt-names = "msi";
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#interrupt-cells = <1>;
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interrupt-map-mask = <0 0 0 0x7>;
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interrupt-map = <0 0 0 1 &intc GIC_SPI 36 IRQ_TYPE_LEVEL_HIGH>, /* int_a */
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<0 0 0 2 &intc GIC_SPI 37 IRQ_TYPE_LEVEL_HIGH>, /* int_b */
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<0 0 0 3 &intc GIC_SPI 38 IRQ_TYPE_LEVEL_HIGH>, /* int_c */
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<0 0 0 4 &intc GIC_SPI 39 IRQ_TYPE_LEVEL_HIGH>; /* int_d */
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resets = <&gcc PCIE_ACLK_RESET>,
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<&gcc PCIE_HCLK_RESET>,
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<&gcc PCIE_POR_RESET>,
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<&gcc PCIE_PCI_RESET>,
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<&gcc PCIE_PHY_RESET>;
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reset-names = "axi", "ahb", "por", "pci", "phy";
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perst-gpios = <&tlmm_pinmux 27 GPIO_ACTIVE_LOW>;
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vdda-supply = <&pm8921_s3>;
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vdda_phy-supply = <&pm8921_lvs6>;
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vdda_refclk-supply = <&v3p3_fixed>;
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pcie@0 {
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device_type = "pci";
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reg = <0x0 0x0 0x0 0x0 0x0>;
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bus-range = <0x01 0xff>;
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#address-cells = <3>;
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#size-cells = <2>;
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ranges;
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};
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};

‎Documentation/devicetree/bindings/pci/qcom,pcie-apq8084.yaml‎

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# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
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%YAML 1.2
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---
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$id: http://devicetree.org/schemas/pci/qcom,pcie-apq8084.yaml#
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$schema: http://devicetree.org/meta-schemas/core.yaml#
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title: Qualcomm APQ8084 PCI Express Root Complex
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maintainers:
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- Bjorn Andersson <andersson@kernel.org>
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- Manivannan Sadhasivam <mani@kernel.org>
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properties:
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compatible:
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enum:
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- qcom,pcie-apq8084
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reg:
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minItems: 4
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maxItems: 5
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reg-names:
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minItems: 4
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items:
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- const: parf
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- const: dbi
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- const: elbi
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- const: config
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- const: mhi
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clocks:
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maxItems: 4
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clock-names:
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items:
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- const: iface # Configuration AHB clock
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- const: master_bus # Master AXI clock
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- const: slave_bus # Slave AXI clock
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- const: aux
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interrupts:
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maxItems: 1
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interrupt-names:
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items:
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- const: msi
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resets:
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maxItems: 1
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reset-names:
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items:
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- const: core
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vdda-supply:
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description: A phandle to the core analog power supply
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required:
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- power-domains
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- resets
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- reset-names
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allOf:
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- $ref: qcom,pcie-common.yaml#
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unevaluatedProperties: false
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examples:
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- |
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#include <dt-bindings/interrupt-controller/arm-gic.h>
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#include <dt-bindings/gpio/gpio.h>
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pcie@fc520000 {
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compatible = "qcom,pcie-apq8084";
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reg = <0xfc520000 0x2000>,
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<0xff000000 0x1000>,
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<0xff001000 0x1000>,
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<0xff002000 0x2000>;
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reg-names = "parf", "dbi", "elbi", "config";
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device_type = "pci";
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linux,pci-domain = <0>;
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bus-range = <0x00 0xff>;
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num-lanes = <1>;
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#address-cells = <3>;
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#size-cells = <2>;
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ranges = <0x81000000 0 0 0xff200000 0 0x00100000>,
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<0x82000000 0 0x00300000 0xff300000 0 0x00d00000>;
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interrupts = <GIC_SPI 243 IRQ_TYPE_LEVEL_HIGH>;
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interrupt-names = "msi";
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#interrupt-cells = <1>;
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interrupt-map-mask = <0 0 0 0x7>;
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interrupt-map = <0 0 0 1 &intc 0 244 IRQ_TYPE_LEVEL_HIGH>,
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<0 0 0 2 &intc 0 245 IRQ_TYPE_LEVEL_HIGH>,
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<0 0 0 3 &intc 0 247 IRQ_TYPE_LEVEL_HIGH>,
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<0 0 0 4 &intc 0 248 IRQ_TYPE_LEVEL_HIGH>;
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clocks = <&gcc 324>,
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<&gcc 325>,
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<&gcc 327>,
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<&gcc 323>;
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clock-names = "iface", "master_bus", "slave_bus", "aux";
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resets = <&gcc 81>;
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reset-names = "core";
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power-domains = <&gcc 1>;
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vdda-supply = <&pma8084_l3>;
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phys = <&pciephy0>;
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phy-names = "pciephy";
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perst-gpios = <&tlmm 70 GPIO_ACTIVE_LOW>;
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pinctrl-0 = <&pcie0_pins_default>;
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pinctrl-names = "default";
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};

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