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JosephChen2017lag-linaro
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mfd: rk8xx: Add RK801 support
The RK801 is a Power Management IC (PMIC) for multimedia and handheld devices. It contains the following components: - 4 BUCK - 2 LDO - 1 SWITCH Signed-off-by: Joseph Chen <chenjh@rock-chips.com> Link: https://patch.msgid.link/20260112124351.17707-3-chenjh@rock-chips.com Signed-off-by: Lee Jones <lee@kernel.org>
1 parent a8a2add commit 156442e

4 files changed

Lines changed: 234 additions & 4 deletions

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drivers/mfd/Kconfig

Lines changed: 3 additions & 3 deletions
Original file line numberDiff line numberDiff line change
@@ -1371,15 +1371,15 @@ config MFD_RK8XX
13711371
select MFD_CORE
13721372

13731373
config MFD_RK8XX_I2C
1374-
tristate "Rockchip RK805/RK808/RK809/RK816/RK817/RK818 Power Management Chip"
1374+
tristate "Rockchip RK8xx Power Management Chips"
13751375
depends on I2C && OF
13761376
select MFD_CORE
13771377
select REGMAP_I2C
13781378
select REGMAP_IRQ
13791379
select MFD_RK8XX
13801380
help
1381-
If you say yes here you get support for the RK805, RK808, RK809,
1382-
RK816, RK817 and RK818 Power Management chips.
1381+
If you say yes here you get support for the RK801, RK805, RK808,
1382+
RK809, RK816, RK817 and RK818 Power Management chips.
13831383
This driver provides common support for accessing the device
13841384
through I2C interface. The device supports multiple sub-devices
13851385
including interrupts, RTC, LDO & DCDC regulators, and onkey.

drivers/mfd/rk8xx-core.c

Lines changed: 81 additions & 0 deletions
Original file line numberDiff line numberDiff line change
@@ -37,6 +37,11 @@ static const struct resource rk817_rtc_resources[] = {
3737
DEFINE_RES_IRQ(RK817_IRQ_RTC_ALARM),
3838
};
3939

40+
static const struct resource rk801_key_resources[] = {
41+
DEFINE_RES_IRQ(RK801_IRQ_PWRON_FALL),
42+
DEFINE_RES_IRQ(RK801_IRQ_PWRON_RISE),
43+
};
44+
4045
static const struct resource rk805_key_resources[] = {
4146
DEFINE_RES_IRQ(RK805_IRQ_PWRON_RISE),
4247
DEFINE_RES_IRQ(RK805_IRQ_PWRON_FALL),
@@ -57,6 +62,14 @@ static const struct resource rk817_charger_resources[] = {
5762
DEFINE_RES_IRQ(RK817_IRQ_PLUG_OUT),
5863
};
5964

65+
static const struct mfd_cell rk801s[] = {
66+
{ .name = "rk808-regulator", },
67+
{ .name = "rk805-pwrkey",
68+
.num_resources = ARRAY_SIZE(rk801_key_resources),
69+
.resources = &rk801_key_resources[0],
70+
},
71+
};
72+
6073
static const struct mfd_cell rk805s[] = {
6174
{ .name = "rk808-clkout", },
6275
{ .name = "rk808-regulator", },
@@ -139,6 +152,15 @@ static const struct mfd_cell rk818s[] = {
139152
},
140153
};
141154

155+
static const struct rk808_reg_data rk801_pre_init_reg[] = {
156+
{ RK801_SLEEP_CFG_REG, RK801_SLEEP_FUN_MSK, RK801_NONE_FUN },
157+
{ RK801_SYS_CFG2_REG, RK801_RST_MSK, RK801_RST_RESTART_REG_RESETB },
158+
{ RK801_INT_CONFIG_REG, RK801_INT_POL_MSK, RK801_INT_ACT_L },
159+
{ RK801_POWER_FPWM_EN_REG, RK801_PLDO_HRDEC_EN, RK801_PLDO_HRDEC_EN },
160+
{ RK801_BUCK_DEBUG5_REG, MASK_ALL, 0x54 },
161+
{ RK801_CON_BACK1_REG, MASK_ALL, 0x18 },
162+
};
163+
142164
static const struct rk808_reg_data rk805_pre_init_reg[] = {
143165
{RK805_BUCK1_CONFIG_REG, RK805_BUCK1_2_ILMAX_MASK,
144166
RK805_BUCK1_2_ILMAX_4000MA},
@@ -284,6 +306,37 @@ static const struct rk808_reg_data rk818_pre_init_reg[] = {
284306
VB_LO_SEL_3500MV },
285307
};
286308

309+
static const struct regmap_irq rk801_irqs[] = {
310+
[RK801_IRQ_PWRON_FALL] = {
311+
.mask = RK801_IRQ_PWRON_FALL_MSK,
312+
.reg_offset = 0,
313+
},
314+
[RK801_IRQ_PWRON_RISE] = {
315+
.mask = RK801_IRQ_PWRON_RISE_MSK,
316+
.reg_offset = 0,
317+
},
318+
[RK801_IRQ_PWRON] = {
319+
.mask = RK801_IRQ_PWRON_MSK,
320+
.reg_offset = 0,
321+
},
322+
[RK801_IRQ_PWRON_LP] = {
323+
.mask = RK801_IRQ_PWRON_LP_MSK,
324+
.reg_offset = 0,
325+
},
326+
[RK801_IRQ_HOTDIE] = {
327+
.mask = RK801_IRQ_HOTDIE_MSK,
328+
.reg_offset = 0,
329+
},
330+
[RK801_IRQ_VDC_RISE] = {
331+
.mask = RK801_IRQ_VDC_RISE_MSK,
332+
.reg_offset = 0,
333+
},
334+
[RK801_IRQ_VDC_FALL] = {
335+
.mask = RK801_IRQ_VDC_FALL_MSK,
336+
.reg_offset = 0,
337+
},
338+
};
339+
287340
static const struct regmap_irq rk805_irqs[] = {
288341
[RK805_IRQ_PWRON_RISE] = {
289342
.mask = RK805_IRQ_PWRON_RISE_MSK,
@@ -532,6 +585,17 @@ static const struct regmap_irq rk817_irqs[RK817_IRQ_END] = {
532585
REGMAP_IRQ_REG_LINE(23, 8)
533586
};
534587

588+
static const struct regmap_irq_chip rk801_irq_chip = {
589+
.name = "rk801",
590+
.irqs = rk801_irqs,
591+
.num_irqs = ARRAY_SIZE(rk801_irqs),
592+
.num_regs = 1,
593+
.status_base = RK801_INT_STS0_REG,
594+
.mask_base = RK801_INT_MASK0_REG,
595+
.ack_base = RK801_INT_STS0_REG,
596+
.init_ack_masked = true,
597+
};
598+
535599
static const struct regmap_irq_chip rk805_irq_chip = {
536600
.name = "rk805",
537601
.irqs = rk805_irqs,
@@ -610,6 +674,10 @@ static int rk808_power_off(struct sys_off_data *data)
610674
unsigned int reg, bit;
611675

612676
switch (rk808->variant) {
677+
case RK801_ID:
678+
reg = RK801_SYS_CFG2_REG;
679+
bit = DEV_OFF;
680+
break;
613681
case RK805_ID:
614682
reg = RK805_DEV_CTRL_REG;
615683
bit = DEV_OFF;
@@ -714,6 +782,13 @@ int rk8xx_probe(struct device *dev, int variant, unsigned int irq, struct regmap
714782
dev_set_drvdata(dev, rk808);
715783

716784
switch (rk808->variant) {
785+
case RK801_ID:
786+
rk808->regmap_irq_chip = &rk801_irq_chip;
787+
pre_init_reg = rk801_pre_init_reg;
788+
nr_pre_init_regs = ARRAY_SIZE(rk801_pre_init_reg);
789+
cells = rk801s;
790+
nr_cells = ARRAY_SIZE(rk801s);
791+
break;
717792
case RK805_ID:
718793
rk808->regmap_irq_chip = &rk805_irq_chip;
719794
pre_init_reg = rk805_pre_init_reg;
@@ -831,6 +906,12 @@ int rk8xx_suspend(struct device *dev)
831906
int ret = 0;
832907

833908
switch (rk808->variant) {
909+
case RK801_ID:
910+
ret = regmap_update_bits(rk808->regmap,
911+
RK801_SLEEP_CFG_REG,
912+
RK801_SLEEP_FUN_MSK,
913+
RK801_SLEEP_FUN);
914+
break;
834915
case RK805_ID:
835916
ret = regmap_update_bits(rk808->regmap,
836917
RK805_GPIO_IO_POL_REG,

drivers/mfd/rk8xx-i2c.c

Lines changed: 32 additions & 1 deletion
Original file line numberDiff line numberDiff line change
@@ -1,6 +1,6 @@
11
// SPDX-License-Identifier: GPL-2.0-only
22
/*
3-
* Rockchip RK805/RK808/RK816/RK817/RK818 Core (I2C) driver
3+
* Rockchip RK801/RK805/RK808/RK816/RK817/RK818 Core (I2C) driver
44
*
55
* Copyright (c) 2014, Fuzhou Rockchip Electronics Co., Ltd
66
* Copyright (C) 2016 PHYTEC Messtechnik GmbH
@@ -21,6 +21,23 @@ struct rk8xx_i2c_platform_data {
2121
int variant;
2222
};
2323

24+
static bool rk801_is_volatile_reg(struct device *dev, unsigned int reg)
25+
{
26+
switch (reg) {
27+
case RK801_SYS_STS_REG:
28+
case RK801_INT_STS0_REG:
29+
case RK801_SYS_CFG0_REG:
30+
case RK801_SYS_CFG1_REG:
31+
case RK801_SYS_CFG2_REG:
32+
case RK801_SYS_CFG3_REG:
33+
case RK801_SYS_CFG4_REG:
34+
case RK801_SLEEP_CFG_REG:
35+
return true;
36+
}
37+
38+
return false;
39+
}
40+
2441
static bool rk806_is_volatile_reg(struct device *dev, unsigned int reg)
2542
{
2643
switch (reg) {
@@ -124,6 +141,14 @@ static const struct regmap_config rk818_regmap_config = {
124141
.volatile_reg = rk808_is_volatile_reg,
125142
};
126143

144+
static const struct regmap_config rk801_regmap_config = {
145+
.reg_bits = 8,
146+
.val_bits = 8,
147+
.max_register = RK801_SYS_CFG3_OTP_REG,
148+
.cache_type = REGCACHE_RBTREE,
149+
.volatile_reg = rk801_is_volatile_reg,
150+
};
151+
127152
static const struct regmap_config rk805_regmap_config = {
128153
.reg_bits = 8,
129154
.val_bits = 8,
@@ -164,6 +189,11 @@ static const struct regmap_config rk817_regmap_config = {
164189
.volatile_reg = rk817_is_volatile_reg,
165190
};
166191

192+
static const struct rk8xx_i2c_platform_data rk801_data = {
193+
.regmap_cfg = &rk801_regmap_config,
194+
.variant = RK801_ID,
195+
};
196+
167197
static const struct rk8xx_i2c_platform_data rk805_data = {
168198
.regmap_cfg = &rk805_regmap_config,
169199
.variant = RK805_ID,
@@ -224,6 +254,7 @@ static void rk8xx_i2c_shutdown(struct i2c_client *client)
224254
static SIMPLE_DEV_PM_OPS(rk8xx_i2c_pm_ops, rk8xx_suspend, rk8xx_resume);
225255

226256
static const struct of_device_id rk8xx_i2c_of_match[] = {
257+
{ .compatible = "rockchip,rk801", .data = &rk801_data },
227258
{ .compatible = "rockchip,rk805", .data = &rk805_data },
228259
{ .compatible = "rockchip,rk806", .data = &rk806_data },
229260
{ .compatible = "rockchip,rk808", .data = &rk808_data },

include/linux/mfd/rk808.h

Lines changed: 118 additions & 0 deletions
Original file line numberDiff line numberDiff line change
@@ -340,6 +340,123 @@ enum rk818_reg {
340340
#define RK818_USB_ILMIN_2000MA 0x7
341341
#define RK818_USB_CHG_SD_VSEL_MASK 0x70
342342

343+
/* RK801 */
344+
enum rk801_reg {
345+
RK801_ID_DCDC1,
346+
RK801_ID_DCDC2,
347+
RK801_ID_DCDC4,
348+
RK801_ID_DCDC3,
349+
RK801_ID_LDO1,
350+
RK801_ID_LDO2,
351+
RK801_ID_SWITCH,
352+
RK801_ID_MAX,
353+
};
354+
355+
#define RK801_SLP_REG_OFFSET 5
356+
#define RK801_NUM_REGULATORS 7
357+
358+
#define RK801_HW_SYNC_US 32
359+
360+
/* RK801 Register Definitions */
361+
#define RK801_ID_MSB 0x00
362+
#define RK801_ID_LSB 0x01
363+
#define RK801_OTP_VER_REG 0x02
364+
#define RK801_POWER_EN0_REG 0x03
365+
#define RK801_POWER_EN1_REG 0x04
366+
#define RK801_POWER_SLP_EN_REG 0x05
367+
#define RK801_POWER_FPWM_EN_REG 0x06
368+
#define RK801_SLP_LP_CONFIG_REG 0x07
369+
#define RK801_BUCK_CONFIG_REG 0x08
370+
#define RK801_BUCK1_ON_VSEL_REG 0x09
371+
#define RK801_BUCK2_ON_VSEL_REG 0x0a
372+
#define RK801_BUCK4_ON_VSEL_REG 0x0b
373+
#define RK801_LDO1_ON_VSEL_REG 0x0c
374+
#define RK801_LDO2_ON_VSEL_REG 0x0d
375+
#define RK801_BUCK1_SLP_VSEL_REG 0x0e
376+
#define RK801_BUCK2_SLP_VSEL_REG 0x0f
377+
#define RK801_BUCK4_SLP_VSEL_REG 0x10
378+
#define RK801_LDO1_SLP_VSEL_REG 0x11
379+
#define RK801_LDO2_SLP_VSEL_REG 0x12
380+
#define RK801_LDO_SW_IMAX_REG 0x13
381+
#define RK801_SYS_STS_REG 0x14
382+
#define RK801_SYS_CFG0_REG 0x15
383+
#define RK801_SYS_CFG1_REG 0x16
384+
#define RK801_SYS_CFG2_REG 0x17
385+
#define RK801_SYS_CFG3_REG 0x18
386+
#define RK801_SYS_CFG4_REG 0x19
387+
#define RK801_SLEEP_CFG_REG 0x1a
388+
#define RK801_ON_SOURCE_REG 0x1b
389+
#define RK801_OFF_SOURCE_REG 0x1c
390+
#define RK801_PWRON_KEY_REG 0x1d
391+
#define RK801_INT_STS0_REG 0x1e
392+
#define RK801_INT_MASK0_REG 0x1f
393+
#define RK801_INT_CONFIG_REG 0x20
394+
#define RK801_CON_BACK1_REG 0x21
395+
#define RK801_CON_BACK2_REG 0x22
396+
#define RK801_DATA_CON0_REG 0x23
397+
#define RK801_DATA_CON1_REG 0x24
398+
#define RK801_DATA_CON2_REG 0x25
399+
#define RK801_DATA_CON3_REG 0x26
400+
#define RK801_POWER_EXIT_SLP_SEQ0_REG 0x27
401+
#define RK801_POWER_EXIT_SLP_SEQ1_REG 0x28
402+
#define RK801_POWER_EXIT_SLP_SEQ2_REG 0x29
403+
#define RK801_POWER_EXIT_SLP_SEQ3_REG 0x2a
404+
#define RK801_POWER_ENTER_SLP_OR_SHTD_SEQ0_REG 0x2b
405+
#define RK801_POWER_ENTER_SLP_OR_SHTD_SEQ1_REG 0x2c
406+
#define RK801_POWER_ENTER_SLP_OR_SHTD_SEQ2_REG 0x2d
407+
#define RK801_POWER_ENTER_SLP_OR_SHTD_SEQ3_REG 0x2e
408+
#define RK801_BUCK_DEBUG1_REG 0x2f
409+
#define RK801_BUCK_DEBUG2_REG 0x30
410+
#define RK801_BUCK_DEBUG3_REG 0x31
411+
#define RK801_BUCK_DEBUG4_REG 0x32
412+
#define RK801_BUCK_DEBUG5_REG 0x33
413+
#define RK801_BUCK_DEBUG7_REG 0x34
414+
#define RK801_OTP_EN_CON_REG 0x35
415+
#define RK801_TEST_CON_REG 0x36
416+
#define RK801_EFUSE_CONTROL_REG 0x37
417+
#define RK801_SYS_CFG3_OTP_REG 0x38
418+
419+
/* RK801 IRQ Definitions */
420+
#define RK801_IRQ_PWRON_FALL 0
421+
#define RK801_IRQ_PWRON_RISE 1
422+
#define RK801_IRQ_PWRON 2
423+
#define RK801_IRQ_PWRON_LP 3
424+
#define RK801_IRQ_HOTDIE 4
425+
#define RK801_IRQ_VDC_RISE 5
426+
#define RK801_IRQ_VDC_FALL 6
427+
#define RK801_IRQ_PWRON_FALL_MSK BIT(0)
428+
#define RK801_IRQ_PWRON_RISE_MSK BIT(1)
429+
#define RK801_IRQ_PWRON_MSK BIT(2)
430+
#define RK801_IRQ_PWRON_LP_MSK BIT(3)
431+
#define RK801_IRQ_HOTDIE_MSK BIT(4)
432+
#define RK801_IRQ_VDC_RISE_MSK BIT(5)
433+
#define RK801_IRQ_VDC_FALL_MSK BIT(6)
434+
/* RK801_SLP_LP_CONFIG_REG */
435+
#define RK801_BUCK_SLP_LP_EN BIT(3)
436+
#define RK801_PLDO_SLP_LP_EN BIT(1)
437+
#define RK801_SLP_LP_MASK (RK801_PLDO_SLP_LP_EN | RK801_BUCK_SLP_LP_EN)
438+
/* RK801_SLEEP_CFG_REG */
439+
#define RK801_SLEEP_FUN_MSK 0x3
440+
#define RK801_NONE_FUN 0x0
441+
#define RK801_SLEEP_FUN 0x1
442+
#define RK801_SHUTDOWN_FUN 0x2
443+
#define RK801_RESET_FUN 0x3
444+
/* RK801_SYS_CFG2_REG */
445+
#define RK801_SLEEP_POL_MSK BIT(1)
446+
#define RK801_SLEEP_ACT_H BIT(1)
447+
#define RK801_SLEEP_ACT_L 0
448+
#define RK801_RST_MSK (0x3 << 4)
449+
#define RK801_RST_RESTART_PMU (0x0 << 4)
450+
#define RK801_RST_RESTART_REG (0x1 << 4)
451+
#define RK801_RST_RESTART_REG_RESETB (0x2 << 4)
452+
/* RK801_INT_CONFIG_REG */
453+
#define RK801_INT_POL_MSK BIT(1)
454+
#define RK801_INT_ACT_H BIT(1)
455+
#define RK801_INT_ACT_L 0
456+
#define RK801_FPWM_MODE 1
457+
#define RK801_AUTO_PWM_MODE 0
458+
#define RK801_PLDO_HRDEC_EN BIT(6)
459+
343460
/* RK805 */
344461
enum rk805_reg {
345462
RK805_ID_DCDC1,
@@ -1332,6 +1449,7 @@ enum {
13321449
};
13331450

13341451
enum {
1452+
RK801_ID = 0x8010,
13351453
RK805_ID = 0x8050,
13361454
RK806_ID = 0x8060,
13371455
RK808_ID = 0x0000,

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