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9 | 9 | * LCR is written whilst busy. If it is, then a busy detect interrupt is |
10 | 10 | * raised, the LCR needs to be rewritten and the uart status register read. |
11 | 11 | */ |
12 | | -#include <linux/acpi.h> |
13 | 12 | #include <linux/clk.h> |
14 | 13 | #include <linux/delay.h> |
15 | 14 | #include <linux/device.h> |
|
55 | 54 | #define DW_UART_QUIRK_ARMADA_38X BIT(1) |
56 | 55 | #define DW_UART_QUIRK_SKIP_SET_RATE BIT(2) |
57 | 56 | #define DW_UART_QUIRK_IS_DMA_FC BIT(3) |
| 57 | +#define DW_UART_QUIRK_APMC0D08 BIT(4) |
58 | 58 |
|
59 | 59 | static inline struct dw8250_data *clk_to_dw8250_data(struct notifier_block *nb) |
60 | 60 | { |
@@ -444,33 +444,29 @@ static void dw8250_prepare_rx_dma(struct uart_8250_port *p) |
444 | 444 |
|
445 | 445 | static void dw8250_quirks(struct uart_port *p, struct dw8250_data *data) |
446 | 446 | { |
447 | | - struct device_node *np = p->dev->of_node; |
448 | | - |
449 | | - if (np) { |
450 | | - unsigned int quirks = data->pdata->quirks; |
| 447 | + unsigned int quirks = data->pdata ? data->pdata->quirks : 0; |
451 | 448 |
|
452 | 449 | #ifdef CONFIG_64BIT |
453 | | - if (quirks & DW_UART_QUIRK_OCTEON) { |
454 | | - p->serial_in = dw8250_serial_inq; |
455 | | - p->serial_out = dw8250_serial_outq; |
456 | | - p->flags = UPF_SKIP_TEST | UPF_SHARE_IRQ | UPF_FIXED_TYPE; |
457 | | - p->type = PORT_OCTEON; |
458 | | - data->skip_autocfg = true; |
459 | | - } |
| 450 | + if (quirks & DW_UART_QUIRK_OCTEON) { |
| 451 | + p->serial_in = dw8250_serial_inq; |
| 452 | + p->serial_out = dw8250_serial_outq; |
| 453 | + p->flags = UPF_SKIP_TEST | UPF_SHARE_IRQ | UPF_FIXED_TYPE; |
| 454 | + p->type = PORT_OCTEON; |
| 455 | + data->skip_autocfg = true; |
| 456 | + } |
460 | 457 | #endif |
461 | 458 |
|
462 | | - if (quirks & DW_UART_QUIRK_ARMADA_38X) |
463 | | - p->serial_out = dw8250_serial_out38x; |
464 | | - if (quirks & DW_UART_QUIRK_SKIP_SET_RATE) |
465 | | - p->set_termios = dw8250_do_set_termios; |
466 | | - if (quirks & DW_UART_QUIRK_IS_DMA_FC) { |
467 | | - data->data.dma.txconf.device_fc = 1; |
468 | | - data->data.dma.rxconf.device_fc = 1; |
469 | | - data->data.dma.prepare_tx_dma = dw8250_prepare_tx_dma; |
470 | | - data->data.dma.prepare_rx_dma = dw8250_prepare_rx_dma; |
471 | | - } |
472 | | - |
473 | | - } else if (acpi_dev_present("APMC0D08", NULL, -1)) { |
| 459 | + if (quirks & DW_UART_QUIRK_ARMADA_38X) |
| 460 | + p->serial_out = dw8250_serial_out38x; |
| 461 | + if (quirks & DW_UART_QUIRK_SKIP_SET_RATE) |
| 462 | + p->set_termios = dw8250_do_set_termios; |
| 463 | + if (quirks & DW_UART_QUIRK_IS_DMA_FC) { |
| 464 | + data->data.dma.txconf.device_fc = 1; |
| 465 | + data->data.dma.rxconf.device_fc = 1; |
| 466 | + data->data.dma.prepare_tx_dma = dw8250_prepare_tx_dma; |
| 467 | + data->data.dma.prepare_rx_dma = dw8250_prepare_rx_dma; |
| 468 | + } |
| 469 | + if (quirks & DW_UART_QUIRK_APMC0D08) { |
474 | 470 | p->iotype = UPIO_MEM32; |
475 | 471 | p->regshift = 2; |
476 | 472 | p->serial_in = dw8250_serial_in32; |
@@ -750,13 +746,18 @@ static const struct of_device_id dw8250_of_match[] = { |
750 | 746 | }; |
751 | 747 | MODULE_DEVICE_TABLE(of, dw8250_of_match); |
752 | 748 |
|
| 749 | +static const struct dw8250_platform_data dw8250_apmc0d08 = { |
| 750 | + .usr_reg = DW_UART_USR, |
| 751 | + .quirks = DW_UART_QUIRK_APMC0D08, |
| 752 | +}; |
| 753 | + |
753 | 754 | static const struct acpi_device_id dw8250_acpi_match[] = { |
754 | 755 | { "80860F0A", (kernel_ulong_t)&dw8250_dw_apb }, |
755 | 756 | { "8086228A", (kernel_ulong_t)&dw8250_dw_apb }, |
756 | 757 | { "AMD0020", (kernel_ulong_t)&dw8250_dw_apb }, |
757 | 758 | { "AMDI0020", (kernel_ulong_t)&dw8250_dw_apb }, |
758 | 759 | { "AMDI0022", (kernel_ulong_t)&dw8250_dw_apb }, |
759 | | - { "APMC0D08", (kernel_ulong_t)&dw8250_dw_apb}, |
| 760 | + { "APMC0D08", (kernel_ulong_t)&dw8250_apmc0d08 }, |
760 | 761 | { "BRCM2032", (kernel_ulong_t)&dw8250_dw_apb }, |
761 | 762 | { "HISI0031", (kernel_ulong_t)&dw8250_dw_apb }, |
762 | 763 | { "INT33C4", (kernel_ulong_t)&dw8250_dw_apb }, |
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