|
27 | 27 | #include <dt-bindings/power/rk3366-power.h> |
28 | 28 | #include <dt-bindings/power/rk3368-power.h> |
29 | 29 | #include <dt-bindings/power/rk3399-power.h> |
| 30 | +#include <dt-bindings/power/rk3568-power.h> |
30 | 31 |
|
31 | 32 | struct rockchip_domain_info { |
32 | 33 | const char *name; |
@@ -135,6 +136,9 @@ struct rockchip_pmu { |
135 | 136 | #define DOMAIN_RK3399(name, pwr, status, req, wakeup) \ |
136 | 137 | DOMAIN(name, pwr, status, req, req, req, wakeup) |
137 | 138 |
|
| 139 | +#define DOMAIN_RK3568(name, pwr, req, wakeup) \ |
| 140 | + DOMAIN_M(name, pwr, pwr, req, req, req, wakeup) |
| 141 | + |
138 | 142 | static bool rockchip_pmu_domain_is_idle(struct rockchip_pm_domain *pd) |
139 | 143 | { |
140 | 144 | struct rockchip_pmu *pmu = pd->pmu; |
@@ -848,6 +852,18 @@ static const struct rockchip_domain_info rk3399_pm_domains[] = { |
848 | 852 | [RK3399_PD_SDIOAUDIO] = DOMAIN_RK3399("sdioaudio", BIT(31), BIT(31), BIT(29), true), |
849 | 853 | }; |
850 | 854 |
|
| 855 | +static const struct rockchip_domain_info rk3568_pm_domains[] = { |
| 856 | + [RK3568_PD_NPU] = DOMAIN_RK3568("npu", BIT(1), BIT(2), false), |
| 857 | + [RK3568_PD_GPU] = DOMAIN_RK3568("gpu", BIT(0), BIT(1), false), |
| 858 | + [RK3568_PD_VI] = DOMAIN_RK3568("vi", BIT(6), BIT(3), false), |
| 859 | + [RK3568_PD_VO] = DOMAIN_RK3568("vo", BIT(7), BIT(4), false), |
| 860 | + [RK3568_PD_RGA] = DOMAIN_RK3568("rga", BIT(5), BIT(5), false), |
| 861 | + [RK3568_PD_VPU] = DOMAIN_RK3568("vpu", BIT(2), BIT(6), false), |
| 862 | + [RK3568_PD_RKVDEC] = DOMAIN_RK3568("vdec", BIT(4), BIT(8), false), |
| 863 | + [RK3568_PD_RKVENC] = DOMAIN_RK3568("venc", BIT(3), BIT(7), false), |
| 864 | + [RK3568_PD_PIPE] = DOMAIN_RK3568("pipe", BIT(8), BIT(11), false), |
| 865 | +}; |
| 866 | + |
851 | 867 | static const struct rockchip_pmu_info px30_pmu = { |
852 | 868 | .pwr_offset = 0x18, |
853 | 869 | .status_offset = 0x20, |
@@ -983,6 +999,17 @@ static const struct rockchip_pmu_info rk3399_pmu = { |
983 | 999 | .domain_info = rk3399_pm_domains, |
984 | 1000 | }; |
985 | 1001 |
|
| 1002 | +static const struct rockchip_pmu_info rk3568_pmu = { |
| 1003 | + .pwr_offset = 0xa0, |
| 1004 | + .status_offset = 0x98, |
| 1005 | + .req_offset = 0x50, |
| 1006 | + .idle_offset = 0x68, |
| 1007 | + .ack_offset = 0x60, |
| 1008 | + |
| 1009 | + .num_domains = ARRAY_SIZE(rk3568_pm_domains), |
| 1010 | + .domain_info = rk3568_pm_domains, |
| 1011 | +}; |
| 1012 | + |
986 | 1013 | static const struct of_device_id rockchip_pm_domain_dt_match[] = { |
987 | 1014 | { |
988 | 1015 | .compatible = "rockchip,px30-power-controller", |
@@ -1028,6 +1055,10 @@ static const struct of_device_id rockchip_pm_domain_dt_match[] = { |
1028 | 1055 | .compatible = "rockchip,rk3399-power-controller", |
1029 | 1056 | .data = (void *)&rk3399_pmu, |
1030 | 1057 | }, |
| 1058 | + { |
| 1059 | + .compatible = "rockchip,rk3568-power-controller", |
| 1060 | + .data = (void *)&rk3568_pmu, |
| 1061 | + }, |
1031 | 1062 | { /* sentinel */ }, |
1032 | 1063 | }; |
1033 | 1064 |
|
|
0 commit comments