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Yang Yingliangbroonie
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spi: zynq-qspi: switch to use modern name
Change legacy name master/slave to modern name host/target or controller. No functional changed. Signed-off-by: Yang Yingliang <yangyingliang@huawei.com> Link: https://msgid.link/r/20231128093031.3707034-24-yangyingliang@huawei.com Signed-off-by: Mark Brown <broonie@kernel.org>
1 parent 061851a commit 178ebb0

1 file changed

Lines changed: 14 additions & 14 deletions

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drivers/spi/spi-zynq-qspi.c

Lines changed: 14 additions & 14 deletions
Original file line numberDiff line numberDiff line change
@@ -54,10 +54,10 @@
5454
#define ZYNQ_QSPI_CONFIG_MSTREN_MASK BIT(0) /* Master Mode */
5555

5656
/*
57-
* QSPI Configuration Register - Baud rate and slave select
57+
* QSPI Configuration Register - Baud rate and target select
5858
*
5959
* These are the values used in the calculation of baud rate divisor and
60-
* setting the slave select.
60+
* setting the target select.
6161
*/
6262
#define ZYNQ_QSPI_CONFIG_BAUD_DIV_MAX GENMASK(2, 0) /* Baud rate maximum */
6363
#define ZYNQ_QSPI_CONFIG_BAUD_DIV_SHIFT 3 /* Baud rate divisor shift */
@@ -164,14 +164,14 @@ static inline void zynq_qspi_write(struct zynq_qspi *xqspi, u32 offset,
164164
*
165165
* The default settings of the QSPI controller's configurable parameters on
166166
* reset are
167-
* - Master mode
167+
* - Host mode
168168
* - Baud rate divisor is set to 2
169169
* - Tx threshold set to 1l Rx threshold set to 32
170170
* - Flash memory interface mode enabled
171171
* - Size of the word to be transferred as 8 bit
172172
* This function performs the following actions
173173
* - Disable and clear all the interrupts
174-
* - Enable manual slave select
174+
* - Enable manual target select
175175
* - Enable manual start
176176
* - Deselect all the chip select lines
177177
* - Set the size of the word to be transferred as 32 bit
@@ -289,7 +289,7 @@ static void zynq_qspi_txfifo_op(struct zynq_qspi *xqspi, unsigned int size)
289289
*/
290290
static void zynq_qspi_chipselect(struct spi_device *spi, bool assert)
291291
{
292-
struct spi_controller *ctlr = spi->master;
292+
struct spi_controller *ctlr = spi->controller;
293293
struct zynq_qspi *xqspi = spi_controller_get_devdata(ctlr);
294294
u32 config_reg;
295295

@@ -377,7 +377,7 @@ static int zynq_qspi_config_op(struct zynq_qspi *xqspi, struct spi_device *spi)
377377
*/
378378
static int zynq_qspi_setup_op(struct spi_device *spi)
379379
{
380-
struct spi_controller *ctlr = spi->master;
380+
struct spi_controller *ctlr = spi->controller;
381381
struct zynq_qspi *qspi = spi_controller_get_devdata(ctlr);
382382

383383
if (ctlr->busy)
@@ -525,7 +525,7 @@ static irqreturn_t zynq_qspi_irq(int irq, void *dev_id)
525525
static int zynq_qspi_exec_mem_op(struct spi_mem *mem,
526526
const struct spi_mem_op *op)
527527
{
528-
struct zynq_qspi *xqspi = spi_controller_get_devdata(mem->spi->master);
528+
struct zynq_qspi *xqspi = spi_controller_get_devdata(mem->spi->controller);
529529
int err = 0, i;
530530
u8 *tmpbuf;
531531

@@ -637,7 +637,7 @@ static int zynq_qspi_probe(struct platform_device *pdev)
637637
struct zynq_qspi *xqspi;
638638
u32 num_cs;
639639

640-
ctlr = spi_alloc_master(&pdev->dev, sizeof(*xqspi));
640+
ctlr = spi_alloc_host(&pdev->dev, sizeof(*xqspi));
641641
if (!ctlr)
642642
return -ENOMEM;
643643

@@ -647,14 +647,14 @@ static int zynq_qspi_probe(struct platform_device *pdev)
647647
xqspi->regs = devm_platform_ioremap_resource(pdev, 0);
648648
if (IS_ERR(xqspi->regs)) {
649649
ret = PTR_ERR(xqspi->regs);
650-
goto remove_master;
650+
goto remove_ctlr;
651651
}
652652

653653
xqspi->pclk = devm_clk_get(&pdev->dev, "pclk");
654654
if (IS_ERR(xqspi->pclk)) {
655655
dev_err(&pdev->dev, "pclk clock not found.\n");
656656
ret = PTR_ERR(xqspi->pclk);
657-
goto remove_master;
657+
goto remove_ctlr;
658658
}
659659

660660
init_completion(&xqspi->data_completion);
@@ -663,13 +663,13 @@ static int zynq_qspi_probe(struct platform_device *pdev)
663663
if (IS_ERR(xqspi->refclk)) {
664664
dev_err(&pdev->dev, "ref_clk clock not found.\n");
665665
ret = PTR_ERR(xqspi->refclk);
666-
goto remove_master;
666+
goto remove_ctlr;
667667
}
668668

669669
ret = clk_prepare_enable(xqspi->pclk);
670670
if (ret) {
671671
dev_err(&pdev->dev, "Unable to enable APB clock.\n");
672-
goto remove_master;
672+
goto remove_ctlr;
673673
}
674674

675675
ret = clk_prepare_enable(xqspi->refclk);
@@ -715,7 +715,7 @@ static int zynq_qspi_probe(struct platform_device *pdev)
715715

716716
ret = devm_spi_register_controller(&pdev->dev, ctlr);
717717
if (ret) {
718-
dev_err(&pdev->dev, "spi_register_master failed\n");
718+
dev_err(&pdev->dev, "devm_spi_register_controller failed\n");
719719
goto clk_dis_all;
720720
}
721721

@@ -725,7 +725,7 @@ static int zynq_qspi_probe(struct platform_device *pdev)
725725
clk_disable_unprepare(xqspi->refclk);
726726
clk_dis_pclk:
727727
clk_disable_unprepare(xqspi->pclk);
728-
remove_master:
728+
remove_ctlr:
729729
spi_controller_put(ctlr);
730730

731731
return ret;

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