Skip to content

Commit 1836bb0

Browse files
Asad Kamalalexdeucher
authored andcommitted
drm/amd/pm: Add critical temp for GC v9.4.3
Add critical temperature message support func for smu v13.0.6 and expose critical temperature as part of hw mon attributes for GC v9.4.3 v2: Added comment for pmfw version requirement & move the check to get_thermal_temperature_range function Signed-off-by: Asad Kamal <asad.kamal@amd.com> Reviewed-by: Lijo Lazar <lijo.lazar@amd.com> Reviewed-by: Hawking Zhang <Hawking.Zhang@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
1 parent 8560915 commit 1836bb0

3 files changed

Lines changed: 55 additions & 4 deletions

File tree

drivers/gpu/drm/amd/pm/amdgpu_pm.c

Lines changed: 4 additions & 4 deletions
Original file line numberDiff line numberDiff line change
@@ -3311,8 +3311,10 @@ static umode_t hwmon_attributes_visible(struct kobject *kobj,
33113311
(gc_ver != IP_VERSION(9, 4, 3)) &&
33123312
(attr == &sensor_dev_attr_temp2_input.dev_attr.attr ||
33133313
attr == &sensor_dev_attr_temp2_label.dev_attr.attr ||
3314+
attr == &sensor_dev_attr_temp2_crit.dev_attr.attr ||
33143315
attr == &sensor_dev_attr_temp3_input.dev_attr.attr ||
3315-
attr == &sensor_dev_attr_temp3_label.dev_attr.attr))
3316+
attr == &sensor_dev_attr_temp3_label.dev_attr.attr ||
3317+
attr == &sensor_dev_attr_temp3_crit.dev_attr.attr))
33163318
return 0;
33173319

33183320
/* hotspot temperature for gc 9,4,3*/
@@ -3324,9 +3326,7 @@ static umode_t hwmon_attributes_visible(struct kobject *kobj,
33243326
/* only SOC15 dGPUs support hotspot and mem temperatures */
33253327
if (((adev->flags & AMD_IS_APU) || gc_ver < IP_VERSION(9, 0, 0) ||
33263328
(gc_ver == IP_VERSION(9, 4, 3))) &&
3327-
(attr == &sensor_dev_attr_temp2_crit.dev_attr.attr ||
3328-
attr == &sensor_dev_attr_temp2_crit_hyst.dev_attr.attr ||
3329-
attr == &sensor_dev_attr_temp3_crit.dev_attr.attr ||
3329+
(attr == &sensor_dev_attr_temp2_crit_hyst.dev_attr.attr ||
33303330
attr == &sensor_dev_attr_temp3_crit_hyst.dev_attr.attr ||
33313331
attr == &sensor_dev_attr_temp1_emergency.dev_attr.attr ||
33323332
attr == &sensor_dev_attr_temp2_emergency.dev_attr.attr ||

drivers/gpu/drm/amd/pm/swsmu/inc/smu_types.h

Lines changed: 1 addition & 0 deletions
Original file line numberDiff line numberDiff line change
@@ -84,6 +84,7 @@
8484
__SMU_DUMMY_MAP(SetTjMax), \
8585
__SMU_DUMMY_MAP(SetFanTemperatureTarget), \
8686
__SMU_DUMMY_MAP(PrepareMp1ForUnload), \
87+
__SMU_DUMMY_MAP(GetCTFLimit), \
8788
__SMU_DUMMY_MAP(DramLogSetDramAddrHigh), \
8889
__SMU_DUMMY_MAP(DramLogSetDramAddrLow), \
8990
__SMU_DUMMY_MAP(DramLogSetDramSize), \

drivers/gpu/drm/amd/pm/swsmu/smu13/smu_v13_0_6_ppt.c

Lines changed: 50 additions & 0 deletions
Original file line numberDiff line numberDiff line change
@@ -132,6 +132,7 @@ static const struct cmn2asic_msg_mapping smu_v13_0_6_message_map[SMU_MSG_MAX_COU
132132
MSG_MAP(SetSoftMinGfxclk, PPSMC_MSG_SetSoftMinGfxClk, 0),
133133
MSG_MAP(SetSoftMaxGfxClk, PPSMC_MSG_SetSoftMaxGfxClk, 0),
134134
MSG_MAP(PrepareMp1ForUnload, PPSMC_MSG_PrepareForDriverUnload, 0),
135+
MSG_MAP(GetCTFLimit, PPSMC_MSG_GetCTFLimit, 0),
135136
};
136137

137138
static const struct cmn2asic_mapping smu_v13_0_6_clk_map[SMU_CLK_COUNT] = {
@@ -2081,6 +2082,54 @@ static int smu_v13_0_6_mode2_reset(struct smu_context *smu)
20812082
return ret;
20822083
}
20832084

2085+
static int smu_v13_0_6_get_thermal_temperature_range(struct smu_context *smu,
2086+
struct smu_temperature_range *range)
2087+
{
2088+
struct amdgpu_device *adev = smu->adev;
2089+
u32 aid_temp, xcd_temp;
2090+
uint32_t smu_version;
2091+
u32 ccd_temp = 0;
2092+
int ret;
2093+
2094+
if (amdgpu_sriov_vf(smu->adev))
2095+
return 0;
2096+
2097+
if (!range)
2098+
return -EINVAL;
2099+
2100+
/*Check smu version, GetCtfLimit message only supported for smu version 85.69 or higher */
2101+
smu_cmn_get_smc_version(smu, NULL, &smu_version);
2102+
if (smu_version < 0x554500)
2103+
return 0;
2104+
2105+
ret = smu_cmn_send_smc_msg_with_param(smu, SMU_MSG_GetCTFLimit,
2106+
PPSMC_AID_THM_TYPE, &aid_temp);
2107+
if (ret)
2108+
goto failed;
2109+
2110+
if (adev->flags & AMD_IS_APU) {
2111+
ret = smu_cmn_send_smc_msg_with_param(smu, SMU_MSG_GetCTFLimit,
2112+
PPSMC_CCD_THM_TYPE, &ccd_temp);
2113+
if (ret)
2114+
goto failed;
2115+
}
2116+
2117+
ret = smu_cmn_send_smc_msg_with_param(smu, SMU_MSG_GetCTFLimit,
2118+
PPSMC_XCD_THM_TYPE, &xcd_temp);
2119+
if (ret)
2120+
goto failed;
2121+
2122+
range->hotspot_crit_max = max3(aid_temp, xcd_temp, ccd_temp);
2123+
ret = smu_cmn_send_smc_msg_with_param(smu, SMU_MSG_GetCTFLimit,
2124+
PPSMC_HBM_THM_TYPE, &range->mem_crit_max);
2125+
if (ret)
2126+
goto failed;
2127+
2128+
return 0;
2129+
failed:
2130+
return ret;
2131+
}
2132+
20842133
static int smu_v13_0_6_mode1_reset(struct smu_context *smu)
20852134
{
20862135
struct amdgpu_device *adev = smu->adev;
@@ -2177,6 +2226,7 @@ static const struct pptable_funcs smu_v13_0_6_ppt_funcs = {
21772226
.get_pp_feature_mask = smu_cmn_get_pp_feature_mask,
21782227
.set_pp_feature_mask = smu_cmn_set_pp_feature_mask,
21792228
.get_gpu_metrics = smu_v13_0_6_get_gpu_metrics,
2229+
.get_thermal_temperature_range = smu_v13_0_6_get_thermal_temperature_range,
21802230
.mode1_reset_is_support = smu_v13_0_6_is_mode1_reset_supported,
21812231
.mode2_reset_is_support = smu_v13_0_6_is_mode2_reset_supported,
21822232
.mode1_reset = smu_v13_0_6_mode1_reset,

0 commit comments

Comments
 (0)