drm/amd/display: Delay PSR entry

[Why]
After panel power up, if PSR entry attempted too early,
PSR state may get stuck in transition.
This could happen if the panel is not ready
to respond to the SDP PSR entry message.
In this case dmub f/w is unable to abort PSR entry
since abortion is not permitted after the SDP has been sent.

[How]
Skip 5 pageflips before PSR enable.

Signed-off-by: Roman Li <roman.li@amd.com>
Reviewed-by: Hersen Wu <hersenxs.wu@amd.com>
Acked-by: Bindu Ramamurthy <bindu.r@amd.com>
Tested-by: Daniel Wheeler <daniel.wheeler@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>

Author: Roman Li

drivers/gpu/drm/amd/display/amdgpu_dm/amdgpu_dm.c

@@ -5900,6 +5900,8 @@ create_stream_for_sink(struct amdgpu_dm_connector *aconnector,
 				stream->use_vsc_sdp_for_colorimetry = true;
 		}
 		mod_build_vsc_infopacket(stream, &stream->vsc_infopacket);
+		aconnector->psr_skip_count = AMDGPU_DM_PSR_ENTRY_DELAY;
+
 	}
 finish:
 	dc_sink_release(sink);
@@ -8713,7 +8715,13 @@ static void amdgpu_dm_commit_planes(struct drm_atomic_state *state,
 		else if ((acrtc_state->update_type == UPDATE_TYPE_FAST) &&
 				acrtc_state->stream->link->psr_settings.psr_feature_enabled &&
 				!acrtc_state->stream->link->psr_settings.psr_allow_active) {
-			amdgpu_dm_psr_enable(acrtc_state->stream);
+			struct amdgpu_dm_connector *aconn = (struct amdgpu_dm_connector *)
+					acrtc_state->stream->dm_stream_context;
+
+			if (aconn->psr_skip_count > 0)
+				aconn->psr_skip_count--;
+			else
+				amdgpu_dm_psr_enable(acrtc_state->stream);
 		}
 
 		mutex_unlock(&dm->dc_lock);

drivers/gpu/drm/amd/display/amdgpu_dm/amdgpu_dm.h

@@ -509,6 +509,8 @@ struct amdgpu_dm_connector {
 	struct dsc_preferred_settings dsc_settings;
 	/* Cached display modes */
 	struct drm_display_mode freesync_vid_base;
+
+	int psr_skip_count;
 };
 
 #define to_amdgpu_dm_connector(x) container_of(x, struct amdgpu_dm_connector, base)

drivers/gpu/drm/amd/display/amdgpu_dm/amdgpu_dm_psr.h

@@ -28,6 +28,9 @@
 
 #include "amdgpu.h"
 
+/* the number of pageflips before enabling psr */
+#define AMDGPU_DM_PSR_ENTRY_DELAY 5
+
 void amdgpu_dm_set_psr_caps(struct dc_link *link);
 bool amdgpu_dm_psr_enable(struct dc_stream_state *stream);
 bool amdgpu_dm_link_setup_psr(struct dc_stream_state *stream);