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Merge branches 'clk-starfive', 'clk-fractional' and 'clk-devmof' into clk-next
 - Shrink size of clk_fractional_divider a little - Convert various clk drivers to devm_of_clk_add_hw_provider() * clk-starfive: clk: starfive: Delete the redundant dev_set_drvdata() in JH7110 clock drivers clk: starfive: Avoid casting iomem pointers MAINTAINERS: generalise StarFive clk/reset entries reset: starfive: Add StarFive JH7110 reset driver clk: starfive: Add StarFive JH7110 always-on clock driver clk: starfive: Add StarFive JH7110 system clock driver reset: starfive: jh71x0: Use 32bit I/O on 32bit registers reset: starfive: Rename "jh7100" to "jh71x0" for the common code reset: starfive: Extract the common JH71X0 reset code reset: starfive: Factor out common JH71X0 reset code reset: Create subdirectory for StarFive drivers reset: starfive: Replace SOC_STARFIVE with ARCH_STARFIVE clk: starfive: Rename "jh7100" to "jh71x0" for the common code clk: starfive: Rename clk-starfive-jh7100.h to clk-starfive-jh71x0.h clk: starfive: Factor out common JH7100 and JH7110 code clk: starfive: Replace SOC_STARFIVE with ARCH_STARFIVE dt-bindings: clock: Add StarFive JH7110 always-on clock and reset generator dt-bindings: clock: Add StarFive JH7110 system clock and reset generator * clk-fractional: clk: Remove mmask and nmask fields in struct clk_fractional_divider clk: rockchip: Remove values for mmask and nmask in struct clk_fractional_divider clk: imx: Remove values for mmask and nmask in struct clk_fractional_divider clk: Compute masks for fractional_divider clk when needed. * clk-devmof: clk: uniphier: Use managed `of_clk_add_hw_provider()` clk: si5351: Use managed `of_clk_add_hw_provider()` clk: si570: Use managed `of_clk_add_hw_provider()` clk: si514: Use managed `of_clk_add_hw_provider()` clk: lmk04832: Use managed `of_clk_add_hw_provider()` clk: hsdk-pll: Use managed `of_clk_add_hw_provider()` clk: cdce706: Use managed `of_clk_add_hw_provider()` clk: axs10x: Use managed `of_clk_add_hw_provider()` clk: axm5516: Use managed `of_clk_add_hw_provider()` clk: axi-clkgen: Use managed `of_clk_add_hw_provider()`
4 parents caca6ad + c19d966 + 14e9854 + c0e1952 commit 1a86e99

40 files changed

Lines changed: 2353 additions & 955 deletions

‎Documentation/devicetree/bindings/clock/starfive,jh7110-aoncrg.yaml‎

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# SPDX-License-Identifier: GPL-2.0-only OR BSD-2-Clause
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%YAML 1.2
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---
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$id: http://devicetree.org/schemas/clock/starfive,jh7110-aoncrg.yaml#
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$schema: http://devicetree.org/meta-schemas/core.yaml#
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title: StarFive JH7110 Always-On Clock and Reset Generator
8+
9+
maintainers:
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- Emil Renner Berthing <kernel@esmil.dk>
11+
12+
properties:
13+
compatible:
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const: starfive,jh7110-aoncrg
15+
16+
reg:
17+
maxItems: 1
18+
19+
clocks:
20+
oneOf:
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- items:
22+
- description: Main Oscillator (24 MHz)
23+
- description: GMAC0 RMII reference or GMAC0 RGMII RX
24+
- description: STG AXI/AHB
25+
- description: APB Bus
26+
- description: GMAC0 GTX
27+
28+
- items:
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- description: Main Oscillator (24 MHz)
30+
- description: GMAC0 RMII reference or GMAC0 RGMII RX
31+
- description: STG AXI/AHB or GMAC0 RGMII RX
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- description: APB Bus or STG AXI/AHB
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- description: GMAC0 GTX or APB Bus
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- description: RTC Oscillator (32.768 kHz) or GMAC0 GTX
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- items:
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- description: Main Oscillator (24 MHz)
38+
- description: GMAC0 RMII reference
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- description: GMAC0 RGMII RX
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- description: STG AXI/AHB
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- description: APB Bus
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- description: GMAC0 GTX
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- description: RTC Oscillator (32.768 kHz)
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clock-names:
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oneOf:
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- minItems: 5
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items:
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- const: osc
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- enum:
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- gmac0_rmii_refin
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- gmac0_rgmii_rxin
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- const: stg_axiahb
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- const: apb_bus
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- const: gmac0_gtxclk
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- const: rtc_osc
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- minItems: 6
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items:
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- const: osc
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- const: gmac0_rmii_refin
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- const: gmac0_rgmii_rxin
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- const: stg_axiahb
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- const: apb_bus
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- const: gmac0_gtxclk
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- const: rtc_osc
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'#clock-cells':
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const: 1
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description:
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See <dt-bindings/clock/starfive,jh7110-crg.h> for valid indices.
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'#reset-cells':
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const: 1
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description:
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See <dt-bindings/reset/starfive,jh7110-crg.h> for valid indices.
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required:
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- compatible
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- reg
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- clocks
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- clock-names
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- '#clock-cells'
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- '#reset-cells'
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additionalProperties: false
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examples:
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- |
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#include <dt-bindings/clock/starfive,jh7110-crg.h>
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clock-controller@17000000 {
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compatible = "starfive,jh7110-aoncrg";
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reg = <0x17000000 0x10000>;
95+
clocks = <&osc>, <&gmac0_rmii_refin>,
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<&gmac0_rgmii_rxin>,
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<&syscrg JH7110_SYSCLK_STG_AXIAHB>,
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<&syscrg JH7110_SYSCLK_APB_BUS>,
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<&syscrg JH7110_SYSCLK_GMAC0_GTXCLK>,
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<&rtc_osc>;
101+
clock-names = "osc", "gmac0_rmii_refin",
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"gmac0_rgmii_rxin", "stg_axiahb",
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"apb_bus", "gmac0_gtxclk",
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"rtc_osc";
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#clock-cells = <1>;
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#reset-cells = <1>;
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};

‎Documentation/devicetree/bindings/clock/starfive,jh7110-syscrg.yaml‎

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# SPDX-License-Identifier: GPL-2.0-only OR BSD-2-Clause
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%YAML 1.2
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---
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$id: http://devicetree.org/schemas/clock/starfive,jh7110-syscrg.yaml#
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$schema: http://devicetree.org/meta-schemas/core.yaml#
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title: StarFive JH7110 System Clock and Reset Generator
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maintainers:
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- Emil Renner Berthing <kernel@esmil.dk>
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properties:
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compatible:
14+
const: starfive,jh7110-syscrg
15+
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reg:
17+
maxItems: 1
18+
19+
clocks:
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oneOf:
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- items:
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- description: Main Oscillator (24 MHz)
23+
- description: GMAC1 RMII reference or GMAC1 RGMII RX
24+
- description: External I2S TX bit clock
25+
- description: External I2S TX left/right channel clock
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- description: External I2S RX bit clock
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- description: External I2S RX left/right channel clock
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- description: External TDM clock
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- description: External audio master clock
30+
31+
- items:
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- description: Main Oscillator (24 MHz)
33+
- description: GMAC1 RMII reference
34+
- description: GMAC1 RGMII RX
35+
- description: External I2S TX bit clock
36+
- description: External I2S TX left/right channel clock
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- description: External I2S RX bit clock
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- description: External I2S RX left/right channel clock
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- description: External TDM clock
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- description: External audio master clock
41+
42+
clock-names:
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oneOf:
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- items:
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- const: osc
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- enum:
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- gmac1_rmii_refin
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- gmac1_rgmii_rxin
49+
- const: i2stx_bclk_ext
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- const: i2stx_lrck_ext
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- const: i2srx_bclk_ext
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- const: i2srx_lrck_ext
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- const: tdm_ext
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- const: mclk_ext
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- items:
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- const: osc
58+
- const: gmac1_rmii_refin
59+
- const: gmac1_rgmii_rxin
60+
- const: i2stx_bclk_ext
61+
- const: i2stx_lrck_ext
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- const: i2srx_bclk_ext
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- const: i2srx_lrck_ext
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- const: tdm_ext
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- const: mclk_ext
66+
67+
'#clock-cells':
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const: 1
69+
description:
70+
See <dt-bindings/clock/starfive,jh7110-crg.h> for valid indices.
71+
72+
'#reset-cells':
73+
const: 1
74+
description:
75+
See <dt-bindings/reset/starfive,jh7110-crg.h> for valid indices.
76+
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required:
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- compatible
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- reg
80+
- clocks
81+
- clock-names
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- '#clock-cells'
83+
- '#reset-cells'
84+
85+
additionalProperties: false
86+
87+
examples:
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- |
89+
clock-controller@13020000 {
90+
compatible = "starfive,jh7110-syscrg";
91+
reg = <0x13020000 0x10000>;
92+
clocks = <&osc>, <&gmac1_rmii_refin>,
93+
<&gmac1_rgmii_rxin>,
94+
<&i2stx_bclk_ext>, <&i2stx_lrck_ext>,
95+
<&i2srx_bclk_ext>, <&i2srx_lrck_ext>,
96+
<&tdm_ext>, <&mclk_ext>;
97+
clock-names = "osc", "gmac1_rmii_refin",
98+
"gmac1_rgmii_rxin",
99+
"i2stx_bclk_ext", "i2stx_lrck_ext",
100+
"i2srx_bclk_ext", "i2srx_lrck_ext",
101+
"tdm_ext", "mclk_ext";
102+
#clock-cells = <1>;
103+
#reset-cells = <1>;
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};

‎MAINTAINERS‎

Lines changed: 12 additions & 10 deletions
Original file line numberDiff line numberDiff line change
@@ -19908,19 +19908,20 @@ M: Emil Renner Berthing <kernel@esmil.dk>
1990819908
S: Maintained
1990919909
F: arch/riscv/boot/dts/starfive/
1991019910

19911-
STARFIVE JH7100 CLOCK DRIVERS
19912-
M: Emil Renner Berthing <kernel@esmil.dk>
19913-
S: Maintained
19914-
F: Documentation/devicetree/bindings/clock/starfive,jh7100-*.yaml
19915-
F: drivers/clk/starfive/clk-starfive-jh7100*
19916-
F: include/dt-bindings/clock/starfive-jh7100*.h
19917-
1991819911
STARFIVE JH7110 MMC/SD/SDIO DRIVER
1991919912
M: William Qiu <william.qiu@starfivetech.com>
1992019913
S: Supported
1992119914
F: Documentation/devicetree/bindings/mmc/starfive*
1992219915
F: drivers/mmc/host/dw_mmc-starfive.c
1992319916

19917+
STARFIVE JH71X0 CLOCK DRIVERS
19918+
M: Emil Renner Berthing <kernel@esmil.dk>
19919+
M: Hal Feng <hal.feng@starfivetech.com>
19920+
S: Maintained
19921+
F: Documentation/devicetree/bindings/clock/starfive,jh71*.yaml
19922+
F: drivers/clk/starfive/clk-starfive-jh71*
19923+
F: include/dt-bindings/clock/starfive?jh71*.h
19924+
1992419925
STARFIVE JH71X0 PINCTRL DRIVERS
1992519926
M: Emil Renner Berthing <kernel@esmil.dk>
1992619927
M: Jianlong Huang <jianlong.huang@starfivetech.com>
@@ -19931,12 +19932,13 @@ F: drivers/pinctrl/starfive/pinctrl-starfive-jh71*
1993119932
F: include/dt-bindings/pinctrl/pinctrl-starfive-jh7100.h
1993219933
F: include/dt-bindings/pinctrl/starfive,jh7110-pinctrl.h
1993319934

19934-
STARFIVE JH7100 RESET CONTROLLER DRIVER
19935+
STARFIVE JH71X0 RESET CONTROLLER DRIVERS
1993519936
M: Emil Renner Berthing <kernel@esmil.dk>
19937+
M: Hal Feng <hal.feng@starfivetech.com>
1993619938
S: Maintained
1993719939
F: Documentation/devicetree/bindings/reset/starfive,jh7100-reset.yaml
19938-
F: drivers/reset/reset-starfive-jh7100.c
19939-
F: include/dt-bindings/reset/starfive-jh7100.h
19940+
F: drivers/reset/starfive/reset-starfive-jh71*
19941+
F: include/dt-bindings/reset/starfive?jh71*.h
1994019942

1994119943
STARFIVE JH71XX PMU CONTROLLER DRIVER
1994219944
M: Walker Chen <walker.chen@starfivetech.com>

‎drivers/clk/Makefile‎

Lines changed: 1 addition & 1 deletion
Original file line numberDiff line numberDiff line change
@@ -120,7 +120,7 @@ obj-$(CONFIG_PLAT_SPEAR) += spear/
120120
obj-y += sprd/
121121
obj-$(CONFIG_ARCH_STI) += st/
122122
obj-$(CONFIG_ARCH_STM32) += stm32/
123-
obj-$(CONFIG_SOC_STARFIVE) += starfive/
123+
obj-y += starfive/
124124
obj-$(CONFIG_ARCH_SUNXI) += sunxi/
125125
obj-y += sunxi-ng/
126126
obj-$(CONFIG_ARCH_TEGRA) += tegra/

‎drivers/clk/axs10x/pll_clock.c‎

Lines changed: 2 additions & 8 deletions
Original file line numberDiff line numberDiff line change
@@ -253,13 +253,8 @@ static int axs10x_pll_clk_probe(struct platform_device *pdev)
253253
return ret;
254254
}
255255

256-
return of_clk_add_hw_provider(dev->of_node, of_clk_hw_simple_get,
257-
&pll_clk->hw);
258-
}
259-
260-
static void axs10x_pll_clk_remove(struct platform_device *pdev)
261-
{
262-
of_clk_del_provider(pdev->dev.of_node);
256+
return devm_of_clk_add_hw_provider(dev, of_clk_hw_simple_get,
257+
&pll_clk->hw);
263258
}
264259

265260
static void __init of_axs10x_pll_clk_setup(struct device_node *node)
@@ -331,7 +326,6 @@ static struct platform_driver axs10x_pll_clk_driver = {
331326
.of_match_table = axs10x_pll_clk_id,
332327
},
333328
.probe = axs10x_pll_clk_probe,
334-
.remove_new = axs10x_pll_clk_remove,
335329
};
336330
builtin_platform_driver(axs10x_pll_clk_driver);
337331

‎drivers/clk/clk-axi-clkgen.c‎

Lines changed: 2 additions & 8 deletions
Original file line numberDiff line numberDiff line change
@@ -553,13 +553,8 @@ static int axi_clkgen_probe(struct platform_device *pdev)
553553
if (ret)
554554
return ret;
555555

556-
return of_clk_add_hw_provider(pdev->dev.of_node, of_clk_hw_simple_get,
557-
&axi_clkgen->clk_hw);
558-
}
559-
560-
static void axi_clkgen_remove(struct platform_device *pdev)
561-
{
562-
of_clk_del_provider(pdev->dev.of_node);
556+
return devm_of_clk_add_hw_provider(&pdev->dev, of_clk_hw_simple_get,
557+
&axi_clkgen->clk_hw);
563558
}
564559

565560
static const struct of_device_id axi_clkgen_ids[] = {
@@ -581,7 +576,6 @@ static struct platform_driver axi_clkgen_driver = {
581576
.of_match_table = axi_clkgen_ids,
582577
},
583578
.probe = axi_clkgen_probe,
584-
.remove_new = axi_clkgen_remove,
585579
};
586580
module_platform_driver(axi_clkgen_driver);
587581

‎drivers/clk/clk-axm5516.c‎

Lines changed: 1 addition & 7 deletions
Original file line numberDiff line numberDiff line change
@@ -569,17 +569,11 @@ static int axmclk_probe(struct platform_device *pdev)
569569
return ret;
570570
}
571571

572-
return of_clk_add_hw_provider(dev->of_node, of_clk_axmclk_get, NULL);
573-
}
574-
575-
static void axmclk_remove(struct platform_device *pdev)
576-
{
577-
of_clk_del_provider(pdev->dev.of_node);
572+
return devm_of_clk_add_hw_provider(dev, of_clk_axmclk_get, NULL);
578573
}
579574

580575
static struct platform_driver axmclk_driver = {
581576
.probe = axmclk_probe,
582-
.remove_new = axmclk_remove,
583577
.driver = {
584578
.name = "clk-axm5516",
585579
.of_match_table = axmclk_match_table,

‎drivers/clk/clk-cdce706.c‎

Lines changed: 2 additions & 9 deletions
Original file line numberDiff line numberDiff line change
@@ -661,16 +661,10 @@ static int cdce706_probe(struct i2c_client *client)
661661
ret = cdce706_register_clkouts(cdce);
662662
if (ret < 0)
663663
return ret;
664-
return of_clk_add_hw_provider(client->dev.of_node, of_clk_cdce_get,
665-
cdce);
664+
return devm_of_clk_add_hw_provider(&client->dev, of_clk_cdce_get,
665+
cdce);
666666
}
667667

668-
static void cdce706_remove(struct i2c_client *client)
669-
{
670-
of_clk_del_provider(client->dev.of_node);
671-
}
672-
673-
674668
#ifdef CONFIG_OF
675669
static const struct of_device_id cdce706_dt_match[] = {
676670
{ .compatible = "ti,cdce706" },
@@ -691,7 +685,6 @@ static struct i2c_driver cdce706_i2c_driver = {
691685
.of_match_table = of_match_ptr(cdce706_dt_match),
692686
},
693687
.probe_new = cdce706_probe,
694-
.remove = cdce706_remove,
695688
.id_table = cdce706_id,
696689
};
697690
module_i2c_driver(cdce706_i2c_driver);

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