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Paolo Abeni
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Merge branch 'net-dsa-initial-support-for-maxlinear-mxl862xx-switches'
Daniel Golle says: ==================== net: dsa: initial support for MaxLinear MxL862xx switches This series adds very basic DSA support for the MaxLinear MxL86252 (5x 2500Base-T PHYs) and MxL86282 (8x 2500Base-T PHYs) switches. In addition to the 2.5G TP ports both switches also come with two SerDes interfaces which can be used either to connect external PHYs or SFP cages, or as CPU port when using the switch with this DSA driver. MxL862xx integrates a firmware running on an embedded processor (based on Zephyr RTOS). Host interaction uses a simple netlink-like API transported over MDIO/MMD. This series includes only what's needed to pass traffic between user ports and the CPU port: relayed MDIO to internal PHYs, basic port enable/disable, and CPU-port special tagging. The SerDes interface of the CPU port is automatically configured by the switch after reset using a board-specific configuration stored together with the firmware in the flash chip attached to the switch, so no action is needed from the driver to setup the interface mode of the CPU port. Also MAC settings of the PHY ports are automatically configured, which means the driver works fine with phylink_mac_ops being all no-op stubs. Multiple follow up series will bring support for setting up the other SerDes PCS interface (ie. not used for the CPU port), bridge, VLAN, ... offloading, and support for using an 802.1Q-based special tag instead of the proprietary 8-byte tag. ==================== Link: https://patch.msgid.link/cover.1770433307.git.daniel@makrotopia.org Signed-off-by: Paolo Abeni <pabeni@redhat.com>
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‎Documentation/devicetree/bindings/net/dsa/maxlinear,mxl862xx.yaml‎

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# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
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%YAML 1.2
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---
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$id: http://devicetree.org/schemas/net/dsa/maxlinear,mxl862xx.yaml#
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$schema: http://devicetree.org/meta-schemas/core.yaml#
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title: MaxLinear MxL862xx Ethernet Switch Family
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maintainers:
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- Daniel Golle <daniel@makrotopia.org>
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description:
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The MaxLinear MxL862xx switch family are multi-port Ethernet switches with
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integrated 2.5GE PHYs. The MxL86252 has five PHY ports and the MxL86282
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has eight PHY ports. Both models come with two 10 Gigabit/s SerDes
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interfaces to be used to connect external PHYs or SFP cages, or as CPU
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port.
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allOf:
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- $ref: dsa.yaml#/$defs/ethernet-ports
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properties:
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compatible:
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enum:
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- maxlinear,mxl86252
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- maxlinear,mxl86282
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reg:
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maxItems: 1
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description: MDIO address of the switch
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mdio:
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$ref: /schemas/net/mdio.yaml#
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unevaluatedProperties: false
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required:
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- compatible
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- mdio
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- reg
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unevaluatedProperties: false
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examples:
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- |
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mdio {
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#address-cells = <1>;
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#size-cells = <0>;
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switch@0 {
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compatible = "maxlinear,mxl86282";
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reg = <0>;
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ethernet-ports {
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#address-cells = <1>;
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#size-cells = <0>;
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/* Microcontroller port */
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port@0 {
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reg = <0>;
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status = "disabled";
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};
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port@1 {
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reg = <1>;
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phy-handle = <&phy0>;
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phy-mode = "internal";
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};
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port@2 {
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reg = <2>;
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phy-handle = <&phy1>;
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phy-mode = "internal";
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};
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port@3 {
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reg = <3>;
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phy-handle = <&phy2>;
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phy-mode = "internal";
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};
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port@4 {
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reg = <4>;
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phy-handle = <&phy3>;
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phy-mode = "internal";
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};
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port@5 {
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reg = <5>;
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phy-handle = <&phy4>;
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phy-mode = "internal";
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};
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port@6 {
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reg = <6>;
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phy-handle = <&phy5>;
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phy-mode = "internal";
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};
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port@7 {
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reg = <7>;
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phy-handle = <&phy6>;
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phy-mode = "internal";
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};
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port@8 {
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reg = <8>;
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phy-handle = <&phy7>;
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phy-mode = "internal";
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};
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port@9 {
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reg = <9>;
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label = "cpu";
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ethernet = <&gmac0>;
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phy-mode = "usxgmii";
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fixed-link {
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speed = <10000>;
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full-duplex;
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};
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};
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};
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mdio {
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#address-cells = <1>;
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#size-cells = <0>;
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phy0: ethernet-phy@0 {
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reg = <0>;
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};
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phy1: ethernet-phy@1 {
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reg = <1>;
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};
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phy2: ethernet-phy@2 {
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reg = <2>;
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};
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phy3: ethernet-phy@3 {
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reg = <3>;
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};
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phy4: ethernet-phy@4 {
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reg = <4>;
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};
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phy5: ethernet-phy@5 {
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reg = <5>;
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};
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phy6: ethernet-phy@6 {
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reg = <6>;
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};
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phy7: ethernet-phy@7 {
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reg = <7>;
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};
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};
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};
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};

‎MAINTAINERS‎

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F: drivers/net/phy/mxl-86110.c
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F: drivers/net/phy/mxl-gpy.c
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MAXLINEAR MXL862XX SWITCH DRIVER
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M: Daniel Golle <daniel@makrotopia.org>
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L: netdev@vger.kernel.org
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S: Maintained
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F: Documentation/devicetree/bindings/net/dsa/maxlinear,mxl862xx.yaml
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F: drivers/net/dsa/mxl862xx/
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F: net/dsa/tag_mxl862xx.c
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MCAN DEVICE DRIVER
1563015638
M: Markus Schneider-Pargmann <msp@baylibre.com>
1563115639
L: linux-can@vger.kernel.org

‎drivers/net/dsa/Kconfig‎

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source "drivers/net/dsa/mv88e6xxx/Kconfig"
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source "drivers/net/dsa/mxl862xx/Kconfig"
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source "drivers/net/dsa/ocelot/Kconfig"
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source "drivers/net/dsa/qca/Kconfig"

‎drivers/net/dsa/Makefile‎

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obj-y += lantiq/
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obj-y += microchip/
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obj-y += mv88e6xxx/
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obj-y += mxl862xx/
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obj-y += ocelot/
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obj-y += qca/
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obj-y += realtek/

‎drivers/net/dsa/mxl862xx/Kconfig‎

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# SPDX-License-Identifier: GPL-2.0-only
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config NET_DSA_MXL862
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tristate "MaxLinear MxL862xx"
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depends on NET_DSA
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select MAXLINEAR_GPHY
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select NET_DSA_TAG_MXL_862XX
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help
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This enables support for the MaxLinear MxL862xx switch family.
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These switches have two 10GE SerDes interfaces, one typically
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used as CPU port.
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- MxL86282 has eight 2.5 Gigabit PHYs
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- MxL86252 has five 2.5 Gigabit PHYs

‎drivers/net/dsa/mxl862xx/Makefile‎

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# SPDX-License-Identifier: GPL-2.0
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obj-$(CONFIG_NET_DSA_MXL862) += mxl862xx_dsa.o
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mxl862xx_dsa-y := mxl862xx.o mxl862xx-host.o

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