@@ -93,6 +93,11 @@ enum rk806_pinmux_option {
9393 RK806_PINMUX_FUN5 ,
9494};
9595
96+ enum rk816_pinmux_option {
97+ RK816_PINMUX_THERMISTOR ,
98+ RK816_PINMUX_GPIO ,
99+ };
100+
96101enum {
97102 RK805_GPIO0 ,
98103 RK805_GPIO1 ,
@@ -104,6 +109,10 @@ enum {
104109 RK806_GPIO_DVS3
105110};
106111
112+ enum {
113+ RK816_GPIO0 ,
114+ };
115+
107116static const char * const rk805_gpio_groups [] = {
108117 "gpio0" ,
109118 "gpio1" ,
@@ -115,6 +124,10 @@ static const char *const rk806_gpio_groups[] = {
115124 "gpio_pwrctrl3" ,
116125};
117126
127+ static const char * const rk816_gpio_groups [] = {
128+ "gpio0" ,
129+ };
130+
118131/* RK805: 2 output only GPIOs */
119132static const struct pinctrl_pin_desc rk805_pins_desc [] = {
120133 PINCTRL_PIN (RK805_GPIO0 , "gpio0" ),
@@ -128,6 +141,11 @@ static const struct pinctrl_pin_desc rk806_pins_desc[] = {
128141 PINCTRL_PIN (RK806_GPIO_DVS3 , "gpio_pwrctrl3" ),
129142};
130143
144+ /* RK816 */
145+ static const struct pinctrl_pin_desc rk816_pins_desc [] = {
146+ PINCTRL_PIN (RK816_GPIO0 , "gpio0" ),
147+ };
148+
131149static const struct rk805_pin_function rk805_pin_functions [] = {
132150 {
133151 .name = "gpio" ,
@@ -176,6 +194,21 @@ static const struct rk805_pin_function rk806_pin_functions[] = {
176194 },
177195};
178196
197+ static const struct rk805_pin_function rk816_pin_functions [] = {
198+ {
199+ .name = "gpio" ,
200+ .groups = rk816_gpio_groups ,
201+ .ngroups = ARRAY_SIZE (rk816_gpio_groups ),
202+ .mux_option = RK816_PINMUX_GPIO ,
203+ },
204+ {
205+ .name = "thermistor" ,
206+ .groups = rk816_gpio_groups ,
207+ .ngroups = ARRAY_SIZE (rk816_gpio_groups ),
208+ .mux_option = RK816_PINMUX_THERMISTOR ,
209+ },
210+ };
211+
179212static const struct rk805_pin_group rk805_pin_groups [] = {
180213 {
181214 .name = "gpio0" ,
@@ -207,6 +240,14 @@ static const struct rk805_pin_group rk806_pin_groups[] = {
207240 }
208241};
209242
243+ static const struct rk805_pin_group rk816_pin_groups [] = {
244+ {
245+ .name = "gpio0" ,
246+ .pins = { RK816_GPIO0 },
247+ .npins = 1 ,
248+ },
249+ };
250+
210251#define RK805_GPIO0_VAL_MSK BIT(0)
211252#define RK805_GPIO1_VAL_MSK BIT(1)
212253
@@ -255,6 +296,20 @@ static struct rk805_pin_config rk806_gpio_cfgs[] = {
255296 }
256297};
257298
299+ #define RK816_FUN_MASK BIT(2)
300+ #define RK816_VAL_MASK BIT(3)
301+ #define RK816_DIR_MASK BIT(4)
302+
303+ static struct rk805_pin_config rk816_gpio_cfgs [] = {
304+ {
305+ .fun_reg = RK818_IO_POL_REG ,
306+ .fun_msk = RK816_FUN_MASK ,
307+ .reg = RK818_IO_POL_REG ,
308+ .val_msk = RK816_VAL_MASK ,
309+ .dir_msk = RK816_DIR_MASK ,
310+ },
311+ };
312+
258313/* generic gpio chip */
259314static int rk805_gpio_get (struct gpio_chip * chip , unsigned int offset )
260315{
@@ -439,6 +494,8 @@ static int rk805_pinctrl_gpio_request_enable(struct pinctrl_dev *pctldev,
439494 return _rk805_pinctrl_set_mux (pctldev , offset , RK805_PINMUX_GPIO );
440495 case RK806_ID :
441496 return _rk805_pinctrl_set_mux (pctldev , offset , RK806_PINMUX_FUN5 );
497+ case RK816_ID :
498+ return _rk805_pinctrl_set_mux (pctldev , offset , RK816_PINMUX_GPIO );
442499 }
443500
444501 return - ENOTSUPP ;
@@ -588,6 +645,18 @@ static int rk805_pinctrl_probe(struct platform_device *pdev)
588645 pci -> pin_cfg = rk806_gpio_cfgs ;
589646 pci -> gpio_chip .ngpio = ARRAY_SIZE (rk806_gpio_cfgs );
590647 break ;
648+ case RK816_ID :
649+ pci -> pins = rk816_pins_desc ;
650+ pci -> num_pins = ARRAY_SIZE (rk816_pins_desc );
651+ pci -> functions = rk816_pin_functions ;
652+ pci -> num_functions = ARRAY_SIZE (rk816_pin_functions );
653+ pci -> groups = rk816_pin_groups ;
654+ pci -> num_pin_groups = ARRAY_SIZE (rk816_pin_groups );
655+ pci -> pinctrl_desc .pins = rk816_pins_desc ;
656+ pci -> pinctrl_desc .npins = ARRAY_SIZE (rk816_pins_desc );
657+ pci -> pin_cfg = rk816_gpio_cfgs ;
658+ pci -> gpio_chip .ngpio = ARRAY_SIZE (rk816_gpio_cfgs );
659+ break ;
591660 default :
592661 dev_err (& pdev -> dev , "unsupported RK805 ID %lu\n" ,
593662 pci -> rk808 -> variant );
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