1616 */
1717struct reg_bits_to_feat_map {
1818 union {
19- u64 bits ;
20- u64 * res0p ;
19+ u64 bits ;
20+ struct fgt_masks * masks ;
2121 };
2222
2323#define NEVER_FGU BIT(0) /* Can trap, but never UNDEF */
2424#define CALL_FUNC BIT(1) /* Needs to evaluate tons of crap */
2525#define FIXED_VALUE BIT(2) /* RAZ/WI or RAO/WI in KVM */
26- #define RES0_POINTER BIT(3) /* Pointer to RES0 value instead of bits */
26+ #define MASKS_POINTER BIT(3) /* Pointer to fgt_masks struct instead of bits */
2727
2828 unsigned long flags ;
2929
@@ -92,8 +92,8 @@ struct reg_feat_map_desc {
9292#define NEEDS_FEAT_FIXED (m , ...) \
9393 __NEEDS_FEAT_FLAG(m, FIXED_VALUE, bits, __VA_ARGS__, 0)
9494
95- #define NEEDS_FEAT_RES0 (p , ...) \
96- __NEEDS_FEAT_FLAG(p, RES0_POINTER, res0p , __VA_ARGS__)
95+ #define NEEDS_FEAT_MASKS (p , ...) \
96+ __NEEDS_FEAT_FLAG(p, MASKS_POINTER, masks , __VA_ARGS__)
9797
9898/*
9999 * Declare the dependency between a set of bits and a set of features,
@@ -109,19 +109,20 @@ struct reg_feat_map_desc {
109109#define DECLARE_FEAT_MAP (n , r , m , f ) \
110110 struct reg_feat_map_desc n = { \
111111 .name = #r, \
112- .feat_map = NEEDS_FEAT(~r##_RES0, f), \
112+ .feat_map = NEEDS_FEAT(~(r##_RES0 | \
113+ r##_RES1), f), \
113114 .bit_feat_map = m, \
114115 .bit_feat_map_sz = ARRAY_SIZE(m), \
115116 }
116117
117118/*
118119 * Specialised version of the above for FGT registers that have their
119- * RES0 masks described as struct fgt_masks.
120+ * RESx masks described as struct fgt_masks.
120121 */
121122#define DECLARE_FEAT_MAP_FGT (n , msk , m , f ) \
122123 struct reg_feat_map_desc n = { \
123124 .name = #msk, \
124- .feat_map = NEEDS_FEAT_RES0 (&msk.res0 , f),\
125+ .feat_map = NEEDS_FEAT_MASKS (&msk, f), \
125126 .bit_feat_map = m, \
126127 .bit_feat_map_sz = ARRAY_SIZE(m), \
127128 }
@@ -140,6 +141,7 @@ struct reg_feat_map_desc {
140141#define FEAT_AA64EL1 ID_AA64PFR0_EL1, EL1, IMP
141142#define FEAT_AA64EL2 ID_AA64PFR0_EL1, EL2, IMP
142143#define FEAT_AA64EL3 ID_AA64PFR0_EL1, EL3, IMP
144+ #define FEAT_SEL2 ID_AA64PFR0_EL1, SEL2, IMP
143145#define FEAT_AIE ID_AA64MMFR3_EL1, AIE, IMP
144146#define FEAT_S2POE ID_AA64MMFR3_EL1, S2POE, IMP
145147#define FEAT_S1POE ID_AA64MMFR3_EL1, S1POE, IMP
@@ -201,6 +203,8 @@ struct reg_feat_map_desc {
201203#define FEAT_ASID2 ID_AA64MMFR4_EL1, ASID2, IMP
202204#define FEAT_MEC ID_AA64MMFR3_EL1, MEC, IMP
203205#define FEAT_HAFT ID_AA64MMFR1_EL1, HAFDBS, HAFT
206+ #define FEAT_HDBSS ID_AA64MMFR1_EL1, HAFDBS, HDBSS
207+ #define FEAT_HPDS2 ID_AA64MMFR1_EL1, HPDS, HPDS2
204208#define FEAT_BTI ID_AA64PFR1_EL1, BT, IMP
205209#define FEAT_ExS ID_AA64MMFR0_EL1, EXS, IMP
206210#define FEAT_IESB ID_AA64MMFR2_EL1, IESB, IMP
@@ -218,6 +222,7 @@ struct reg_feat_map_desc {
218222#define FEAT_FGT2 ID_AA64MMFR0_EL1, FGT, FGT2
219223#define FEAT_MTPMU ID_AA64DFR0_EL1, MTPMU, IMP
220224#define FEAT_HCX ID_AA64MMFR1_EL1, HCX, IMP
225+ #define FEAT_S2PIE ID_AA64MMFR3_EL1, S2PIE, IMP
221226
222227static bool not_feat_aa64el3 (struct kvm * kvm )
223228{
@@ -361,6 +366,28 @@ static bool feat_pmuv3p9(struct kvm *kvm)
361366 return check_pmu_revision (kvm , V3P9 );
362367}
363368
369+ #define has_feat_s2tgran (k , s ) \
370+ ((kvm_has_feat_enum(kvm, ID_AA64MMFR0_EL1, TGRAN##s##_2, TGRAN##s) && \
371+ kvm_has_feat(kvm, ID_AA64MMFR0_EL1, TGRAN##s, IMP)) || \
372+ kvm_has_feat(kvm, ID_AA64MMFR0_EL1, TGRAN##s##_2, IMP))
373+
374+ static bool feat_lpa2 (struct kvm * kvm )
375+ {
376+ return ((kvm_has_feat (kvm , ID_AA64MMFR0_EL1 , TGRAN4 , 52 _BIT ) ||
377+ !kvm_has_feat (kvm , ID_AA64MMFR0_EL1 , TGRAN4 , IMP )) &&
378+ (kvm_has_feat (kvm , ID_AA64MMFR0_EL1 , TGRAN16 , 52 _BIT ) ||
379+ !kvm_has_feat (kvm , ID_AA64MMFR0_EL1 , TGRAN16 , IMP )) &&
380+ (kvm_has_feat (kvm , ID_AA64MMFR0_EL1 , TGRAN4_2 , 52 _BIT ) ||
381+ !has_feat_s2tgran (kvm , 4 )) &&
382+ (kvm_has_feat (kvm , ID_AA64MMFR0_EL1 , TGRAN16_2 , 52 _BIT ) ||
383+ !has_feat_s2tgran (kvm , 16 )));
384+ }
385+
386+ static bool feat_vmid16 (struct kvm * kvm )
387+ {
388+ return kvm_has_feat_enum (kvm , ID_AA64MMFR1_EL1 , VMIDBits , 16 );
389+ }
390+
364391static bool compute_hcr_rw (struct kvm * kvm , u64 * bits )
365392{
366393 /* This is purely academic: AArch32 and NV are mutually exclusive */
@@ -1167,22 +1194,60 @@ static const struct reg_bits_to_feat_map mdcr_el2_feat_map[] = {
11671194static const DECLARE_FEAT_MAP (mdcr_el2_desc , MDCR_EL2 ,
11681195 mdcr_el2_feat_map , FEAT_AA64EL2 )
11691196
1197+ static const struct reg_bits_to_feat_map vtcr_el2_feat_map [] = {
1198+ NEEDS_FEAT (VTCR_EL2_HDBSS , FEAT_HDBSS ),
1199+ NEEDS_FEAT (VTCR_EL2_HAFT , FEAT_HAFT ),
1200+ NEEDS_FEAT (VTCR_EL2_TL0 |
1201+ VTCR_EL2_TL1 |
1202+ VTCR_EL2_AssuredOnly |
1203+ VTCR_EL2_GCSH ,
1204+ FEAT_THE ),
1205+ NEEDS_FEAT (VTCR_EL2_D128 , FEAT_D128 ),
1206+ NEEDS_FEAT (VTCR_EL2_S2POE , FEAT_S2POE ),
1207+ NEEDS_FEAT (VTCR_EL2_S2PIE , FEAT_S2PIE ),
1208+ NEEDS_FEAT (VTCR_EL2_SL2 |
1209+ VTCR_EL2_DS ,
1210+ feat_lpa2 ),
1211+ NEEDS_FEAT (VTCR_EL2_NSA |
1212+ VTCR_EL2_NSW ,
1213+ FEAT_SEL2 ),
1214+ NEEDS_FEAT (VTCR_EL2_HWU62 |
1215+ VTCR_EL2_HWU61 |
1216+ VTCR_EL2_HWU60 |
1217+ VTCR_EL2_HWU59 ,
1218+ FEAT_HPDS2 ),
1219+ NEEDS_FEAT (VTCR_EL2_HD , ID_AA64MMFR1_EL1 , HAFDBS , DBM ),
1220+ NEEDS_FEAT (VTCR_EL2_HA , ID_AA64MMFR1_EL1 , HAFDBS , AF ),
1221+ NEEDS_FEAT (VTCR_EL2_VS , feat_vmid16 ),
1222+ NEEDS_FEAT (VTCR_EL2_PS |
1223+ VTCR_EL2_TG0 |
1224+ VTCR_EL2_SH0 |
1225+ VTCR_EL2_ORGN0 |
1226+ VTCR_EL2_IRGN0 |
1227+ VTCR_EL2_SL0 |
1228+ VTCR_EL2_T0SZ ,
1229+ FEAT_AA64EL1 ),
1230+ };
1231+
1232+ static const DECLARE_FEAT_MAP (vtcr_el2_desc , VTCR_EL2 ,
1233+ vtcr_el2_feat_map , FEAT_AA64EL2 )
1234+
11701235static void __init check_feat_map (const struct reg_bits_to_feat_map * map ,
1171- int map_size , u64 res0 , const char * str )
1236+ int map_size , u64 resx , const char * str )
11721237{
11731238 u64 mask = 0 ;
11741239
11751240 for (int i = 0 ; i < map_size ; i ++ )
11761241 mask |= map [i ].bits ;
11771242
1178- if (mask != ~res0 )
1243+ if (mask != ~resx )
11791244 kvm_err ("Undefined %s behaviour, bits %016llx\n" ,
1180- str , mask ^ ~res0 );
1245+ str , mask ^ ~resx );
11811246}
11821247
11831248static u64 reg_feat_map_bits (const struct reg_bits_to_feat_map * map )
11841249{
1185- return map -> flags & RES0_POINTER ? ~( * map -> res0p ) : map -> bits ;
1250+ return map -> flags & MASKS_POINTER ? ( map -> masks -> mask | map -> masks -> nmask ) : map -> bits ;
11861251}
11871252
11881253static void __init check_reg_desc (const struct reg_feat_map_desc * r )
@@ -1210,6 +1275,7 @@ void __init check_feature_map(void)
12101275 check_reg_desc (& tcr2_el2_desc );
12111276 check_reg_desc (& sctlr_el1_desc );
12121277 check_reg_desc (& mdcr_el2_desc );
1278+ check_reg_desc (& vtcr_el2_desc );
12131279}
12141280
12151281static bool idreg_feat_match (struct kvm * kvm , const struct reg_bits_to_feat_map * map )
@@ -1424,6 +1490,10 @@ void get_reg_fixed_bits(struct kvm *kvm, enum vcpu_sysreg reg, u64 *res0, u64 *r
14241490 * res0 = compute_reg_res0_bits (kvm , & mdcr_el2_desc , 0 , 0 );
14251491 * res1 = MDCR_EL2_RES1 ;
14261492 break ;
1493+ case VTCR_EL2 :
1494+ * res0 = compute_reg_res0_bits (kvm , & vtcr_el2_desc , 0 , 0 );
1495+ * res1 = VTCR_EL2_RES1 ;
1496+ break ;
14271497 default :
14281498 WARN_ON_ONCE (1 );
14291499 * res0 = * res1 = 0 ;
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