Merge tag 'qcom-dts-fixes-for-6.4' of https://git.kernel.org/pub/scm/linux/kernel/git/qcom/linux into arm/fixes

Qualcomm ARM32 fix for 6.4

A range of 32-bit Qualcomm platforms are missing cache-unified, which is
now required by the binding, this is now corrected.

* tag 'qcom-dts-fixes-for-6.4' of https://git.kernel.org/pub/scm/linux/kernel/git/qcom/linux:
  ARM: dts: qcom: add missing cache properties

Link: https://lore.kernel.org/r/20230601140347.2245680-1-andersson@kernel.org
Signed-off-by: Arnd Bergmann <arnd@arndb.de>

Author: arndb

arch/arm/boot/dts/qcom-apq8064.dtsi

@@ -83,6 +83,7 @@
 		L2: l2-cache {
 			compatible = "cache";
 			cache-level = <2>;
+			cache-unified;
 		};
 
 		idle-states {

arch/arm/boot/dts/qcom-apq8084.dtsi

@@ -74,6 +74,7 @@
 		L2: l2-cache {
 			compatible = "cache";
 			cache-level = <2>;
+			cache-unified;
 			qcom,saw = <&saw_l2>;
 		};
 

arch/arm/boot/dts/qcom-ipq4019.dtsi

@@ -102,6 +102,7 @@
 		L2: l2-cache {
 			compatible = "cache";
 			cache-level = <2>;
+			cache-unified;
 			qcom,saw = <&saw_l2>;
 		};
 	};

arch/arm/boot/dts/qcom-ipq8064.dtsi

@@ -45,6 +45,7 @@
 		L2: l2-cache {
 			compatible = "cache";
 			cache-level = <2>;
+			cache-unified;
 		};
 	};
 

arch/arm/boot/dts/qcom-msm8660.dtsi

@@ -36,6 +36,7 @@
 		L2: l2-cache {
 			compatible = "cache";
 			cache-level = <2>;
+			cache-unified;
 		};
 	};
 

arch/arm/boot/dts/qcom-msm8960.dtsi

@@ -42,6 +42,7 @@
 		L2: l2-cache {
 			compatible = "cache";
 			cache-level = <2>;
+			cache-unified;
 		};
 	};
 

arch/arm/boot/dts/qcom-msm8974.dtsi

@@ -80,6 +80,7 @@
 		L2: l2-cache {
 			compatible = "cache";
 			cache-level = <2>;
+			cache-unified;
 			qcom,saw = <&saw_l2>;
 		};