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266 | 266 | reg = <0x400e0000 0x400>; |
267 | 267 | interrupts = <GIC_SPI 115 IRQ_TYPE_LEVEL_HIGH>; |
268 | 268 | clocks = <&rcc CK_KER_USART2>; |
| 269 | + dmas = <&hpdma 11 0x20 0x10012>, |
| 270 | + <&hpdma 12 0x20 0x3021>; |
| 271 | + dma-names = "rx", "tx"; |
269 | 272 | access-controllers = <&rifsc 32>; |
270 | 273 | status = "disabled"; |
271 | 274 | }; |
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275 | 278 | reg = <0x400f0000 0x400>; |
276 | 279 | interrupts = <GIC_SPI 116 IRQ_TYPE_LEVEL_HIGH>; |
277 | 280 | clocks = <&rcc CK_KER_USART3>; |
| 281 | + dmas = <&hpdma 13 0x20 0x10012>, |
| 282 | + <&hpdma 14 0x20 0x3021>; |
| 283 | + dma-names = "rx", "tx"; |
278 | 284 | access-controllers = <&rifsc 33>; |
279 | 285 | status = "disabled"; |
280 | 286 | }; |
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284 | 290 | reg = <0x40100000 0x400>; |
285 | 291 | interrupts = <GIC_SPI 126 IRQ_TYPE_LEVEL_HIGH>; |
286 | 292 | clocks = <&rcc CK_KER_UART4>; |
| 293 | + dmas = <&hpdma 15 0x20 0x10012>, |
| 294 | + <&hpdma 16 0x20 0x3021>; |
| 295 | + dma-names = "rx", "tx"; |
287 | 296 | access-controllers = <&rifsc 34>; |
288 | 297 | status = "disabled"; |
289 | 298 | }; |
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293 | 302 | reg = <0x40110000 0x400>; |
294 | 303 | interrupts = <GIC_SPI 127 IRQ_TYPE_LEVEL_HIGH>; |
295 | 304 | clocks = <&rcc CK_KER_UART5>; |
| 305 | + dmas = <&hpdma 17 0x20 0x10012>, |
| 306 | + <&hpdma 18 0x20 0x3021>; |
| 307 | + dma-names = "rx", "tx"; |
296 | 308 | access-controllers = <&rifsc 35>; |
297 | 309 | status = "disabled"; |
298 | 310 | }; |
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393 | 405 | reg = <0x40220000 0x400>; |
394 | 406 | interrupts = <GIC_SPI 136 IRQ_TYPE_LEVEL_HIGH>; |
395 | 407 | clocks = <&rcc CK_KER_USART6>; |
| 408 | + dmas = <&hpdma 19 0x20 0x10012>, |
| 409 | + <&hpdma 20 0x20 0x3021>; |
| 410 | + dma-names = "rx", "tx"; |
396 | 411 | access-controllers = <&rifsc 36>; |
397 | 412 | status = "disabled"; |
398 | 413 | }; |
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438 | 453 | reg = <0x402c0000 0x400>; |
439 | 454 | interrupts = <GIC_SPI 150 IRQ_TYPE_LEVEL_HIGH>; |
440 | 455 | clocks = <&rcc CK_KER_UART9>; |
| 456 | + dmas = <&hpdma 25 0x20 0x10012>, |
| 457 | + <&hpdma 26 0x20 0x3021>; |
| 458 | + dma-names = "rx", "tx"; |
441 | 459 | access-controllers = <&rifsc 39>; |
442 | 460 | status = "disabled"; |
443 | 461 | }; |
|
447 | 465 | reg = <0x40330000 0x400>; |
448 | 466 | interrupts = <GIC_SPI 114 IRQ_TYPE_LEVEL_HIGH>; |
449 | 467 | clocks = <&rcc CK_KER_USART1>; |
| 468 | + dmas = <&hpdma 9 0x20 0x10012>, |
| 469 | + <&hpdma 10 0x20 0x3021>; |
| 470 | + dma-names = "rx", "tx"; |
450 | 471 | access-controllers = <&rifsc 31>; |
451 | 472 | status = "disabled"; |
452 | 473 | }; |
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480 | 501 | reg = <0x40370000 0x400>; |
481 | 502 | interrupts = <GIC_SPI 148 IRQ_TYPE_LEVEL_HIGH>; |
482 | 503 | clocks = <&rcc CK_KER_UART7>; |
| 504 | + dmas = <&hpdma 21 0x20 0x10012>, |
| 505 | + <&hpdma 22 0x20 0x3021>; |
| 506 | + dma-names = "rx", "tx"; |
483 | 507 | access-controllers = <&rifsc 37>; |
484 | 508 | status = "disabled"; |
485 | 509 | }; |
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489 | 513 | reg = <0x40380000 0x400>; |
490 | 514 | interrupts = <GIC_SPI 149 IRQ_TYPE_LEVEL_HIGH>; |
491 | 515 | clocks = <&rcc CK_KER_UART8>; |
| 516 | + dmas = <&hpdma 23 0x20 0x10012>, |
| 517 | + <&hpdma 24 0x20 0x3021>; |
| 518 | + dma-names = "rx", "tx"; |
492 | 519 | access-controllers = <&rifsc 38>; |
493 | 520 | status = "disabled"; |
494 | 521 | }; |
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