Commit 1fc8dc5
spi: axi-spi-engine: remove spi_engine_get_clk_div()
Now that host->max_speed_hz and xfer->effective_speed_hz are properly
set, we can use them instead of having to do more complex calculations
to get the clock divider for each transfer.
This removes the spi_engine_get_clk_div() function and replaces it with
just dividing the two clock rates. Since the hardware register value is
the divider minus one, we need to subtract one. Subtracting one was
previously done in the spi_engine_get_clk_div() function.
Signed-off-by: David Lechner <dlechner@baylibre.com>
Acked-by: Michael Hennerich <michael.hennerich@analog.com>
Acked-by: Nuno Sa <nuno.sa@analog.com>
Link: https://lore.kernel.org/r/20231204-axi-spi-engine-series-2-v1-3-063672323fce@baylibre.com
Signed-off-by: Mark Brown <broonie@kernel.org>1 parent 9d023ec commit 1fc8dc5
1 file changed
Lines changed: 5 additions & 18 deletions
| Original file line number | Diff line number | Diff line change | |
|---|---|---|---|
| |||
140 | 140 | | |
141 | 141 | | |
142 | 142 | | |
143 | | - | |
144 | | - | |
145 | | - | |
146 | | - | |
147 | | - | |
148 | | - | |
149 | | - | |
150 | | - | |
151 | | - | |
152 | | - | |
153 | | - | |
154 | | - | |
155 | | - | |
156 | | - | |
157 | | - | |
158 | 143 | | |
159 | 144 | | |
160 | 145 | | |
| |||
243 | 228 | | |
244 | 229 | | |
245 | 230 | | |
| 231 | + | |
246 | 232 | | |
247 | 233 | | |
248 | 234 | | |
| |||
258 | 244 | | |
259 | 245 | | |
260 | 246 | | |
261 | | - | |
| 247 | + | |
262 | 248 | | |
263 | 249 | | |
| 250 | + | |
264 | 251 | | |
265 | 252 | | |
266 | | - | |
| 253 | + | |
267 | 254 | | |
268 | 255 | | |
269 | 256 | | |
| |||
274 | 261 | | |
275 | 262 | | |
276 | 263 | | |
277 | | - | |
| 264 | + | |
278 | 265 | | |
279 | 266 | | |
280 | 267 | | |
| |||
0 commit comments