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Nicholas Kazlauskasalexdeucher
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drm/amd/display: Guard against invalid RPTR/WPTR being set
[WHY] HW can return invalid values on register read, guard against these being set and causing us to access memory out of range and page fault. [HOW] Guard at sync_inbox1 and guard at pushing commands. Cc: Mario Limonciello <mario.limonciello@amd.com> Cc: Alex Deucher <alexander.deucher@amd.com> Cc: stable@vger.kernel.org Reviewed-by: Hansen Dsouza <hansen.dsouza@amd.com> Acked-by: Alex Hung <alex.hung@amd.com> Signed-off-by: Nicholas Kazlauskas <nicholas.kazlauskas@amd.com> Tested-by: Daniel Wheeler <daniel.wheeler@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
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1 file changed

Lines changed: 15 additions & 3 deletions

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drivers/gpu/drm/amd/display/dmub/src/dmub_srv.c

Lines changed: 15 additions & 3 deletions
Original file line numberDiff line numberDiff line change
@@ -707,9 +707,16 @@ enum dmub_status dmub_srv_sync_inbox1(struct dmub_srv *dmub)
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return DMUB_STATUS_INVALID;
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if (dmub->hw_funcs.get_inbox1_rptr && dmub->hw_funcs.get_inbox1_wptr) {
710-
dmub->inbox1_rb.rptr = dmub->hw_funcs.get_inbox1_rptr(dmub);
711-
dmub->inbox1_rb.wrpt = dmub->hw_funcs.get_inbox1_wptr(dmub);
712-
dmub->inbox1_last_wptr = dmub->inbox1_rb.wrpt;
710+
uint32_t rptr = dmub->hw_funcs.get_inbox1_rptr(dmub);
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uint32_t wptr = dmub->hw_funcs.get_inbox1_wptr(dmub);
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if (rptr > dmub->inbox1_rb.capacity || wptr > dmub->inbox1_rb.capacity) {
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return DMUB_STATUS_HW_FAILURE;
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} else {
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dmub->inbox1_rb.rptr = rptr;
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dmub->inbox1_rb.wrpt = wptr;
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dmub->inbox1_last_wptr = dmub->inbox1_rb.wrpt;
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}
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}
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return DMUB_STATUS_OK;
@@ -743,6 +750,11 @@ enum dmub_status dmub_srv_cmd_queue(struct dmub_srv *dmub,
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if (!dmub->hw_init)
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return DMUB_STATUS_INVALID;
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if (dmub->inbox1_rb.rptr > dmub->inbox1_rb.capacity ||
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dmub->inbox1_rb.wrpt > dmub->inbox1_rb.capacity) {
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return DMUB_STATUS_HW_FAILURE;
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}
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if (dmub_rb_push_front(&dmub->inbox1_rb, cmd))
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return DMUB_STATUS_OK;
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