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Merge tag 'spi-v5.16' of git://git.kernel.org/pub/scm/linux/kernel/git/broonie/spi
Pull spi updates from Mark Brown: "This is quite a quiet release for SPI, there's been a bit of cleanup to the core from Uwe but nothing functionality wise. We have added several new drivers, Cadence XSPI, Ingenic JZ47xx, Qualcomm SC7280 and SC7180 and Xilinx Versal OSPI" * tag 'spi-v5.16' of git://git.kernel.org/pub/scm/linux/kernel/git/broonie/spi: (41 commits) spi: Convert NXP flexspi to json schema spi: spi-geni-qcom: Add support for GPI dma spi: fsi: Fix contention in the FSI2SPI engine spi: spi-rpc-if: Check return value of rpcif_sw_init() spi: tegra210-quad: Put device into suspend on driver removal spi: tegra20-slink: Put device into suspend on driver removal spi: bcm-qspi: Fix missing clk_disable_unprepare() on error in bcm_qspi_probe() spi: at91-usart: replacing legacy gpio interface for gpiod spi: replace snprintf in show functions with sysfs_emit spi: cadence: Add of_node_put() before return spi: orion: Add of_node_put() before goto spi: cadence-quadspi: fix dma_unmap_single() call spi: tegra20: fix build with CONFIG_PM_SLEEP=n spi: bcm-qspi: add support for 3-wire mode for half duplex transfer spi: bcm-qspi: Add mspi spcr3 32/64-bits xfer mode spi: Make several public functions private to spi.c spi: Reorder functions to simplify the next commit spi: Remove unused function spi_busnum_to_master() spi: Move comment about chipselect check to the right place spi: fsi: Print status on error ...
2 parents 1260d24 + 28b5eaf commit 2019295

34 files changed

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‎Documentation/devicetree/bindings/spi/cdns,qspi-nor.yaml‎

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allOf:
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- $ref: spi-controller.yaml#
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- if:
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properties:
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compatible:
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contains:
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const: xlnx,versal-ospi-1.0
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then:
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required:
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- power-domains
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properties:
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compatible:
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- ti,k2g-qspi
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- ti,am654-ospi
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- intel,lgm-qspi
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- xlnx,versal-ospi-1.0
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- const: cdns,qspi-nor
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- const: cdns,qspi-nor
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data rather than the QSPI clock. Make sure that QSPI return clock
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is populated on the board before using this property.
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power-domains:
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maxItems: 1
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resets:
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maxItems: 2
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‎Documentation/devicetree/bindings/spi/cdns,xspi.yaml‎

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# SPDX-License-Identifier: (GPL-2.0 OR BSD-2-Clause)
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# Copyright 2020-21 Cadence
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%YAML 1.2
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---
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$id: "http://devicetree.org/schemas/spi/cdns,xspi.yaml#"
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$schema: "http://devicetree.org/meta-schemas/core.yaml#"
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title: Cadence XSPI Controller
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maintainers:
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- Parshuram Thombare <pthombar@cadence.com>
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description: |
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The XSPI controller allows SPI protocol communication in
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single, dual, quad or octal wire transmission modes for
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read/write access to slaves such as SPI-NOR flash.
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allOf:
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- $ref: "spi-controller.yaml#"
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properties:
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compatible:
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const: cdns,xspi-nor
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reg:
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items:
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- description: address and length of the controller register set
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- description: address and length of the Slave DMA data port
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- description: address and length of the auxiliary registers
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reg-names:
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items:
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- const: io
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- const: sdma
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- const: aux
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interrupts:
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maxItems: 1
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required:
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- compatible
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- reg
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- interrupts
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unevaluatedProperties: false
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examples:
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- |
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#include <dt-bindings/interrupt-controller/irq.h>
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bus {
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#address-cells = <2>;
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#size-cells = <2>;
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xspi: spi@a0010000 {
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#address-cells = <1>;
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#size-cells = <0>;
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compatible = "cdns,xspi-nor";
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reg = <0x0 0xa0010000 0x0 0x1040>,
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<0x0 0xb0000000 0x0 0x1000>,
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<0x0 0xa0020000 0x0 0x100>;
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reg-names = "io", "sdma", "aux";
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interrupts = <0 90 IRQ_TYPE_LEVEL_HIGH>;
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interrupt-parent = <&gic>;
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flash@0 {
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compatible = "jedec,spi-nor";
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spi-max-frequency = <75000000>;
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reg = <0>;
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};
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flash@1 {
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compatible = "jedec,spi-nor";
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spi-max-frequency = <75000000>;
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reg = <1>;
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};
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};
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};

‎Documentation/devicetree/bindings/spi/ingenic,spi.yaml‎

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# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
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%YAML 1.2
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---
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$id: http://devicetree.org/schemas/spi/ingenic,spi.yaml#
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$schema: http://devicetree.org/meta-schemas/core.yaml#
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title: Ingenic SoCs SPI controller devicetree bindings
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maintainers:
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- Artur Rojek <contact@artur-rojek.eu>
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- Paul Cercueil <paul@crapouillou.net>
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allOf:
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- $ref: /schemas/spi/spi-controller.yaml#
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properties:
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compatible:
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oneOf:
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- enum:
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- ingenic,jz4750-spi
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- ingenic,jz4780-spi
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- items:
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- enum:
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- ingenic,jz4760-spi
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- ingenic,jz4770-spi
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- const: ingenic,jz4750-spi
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reg:
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maxItems: 1
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interrupts:
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maxItems: 1
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clocks:
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maxItems: 1
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dmas:
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maxItems: 2
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minItems: 2
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dma-names:
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items:
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- const: rx
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- const: tx
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required:
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- compatible
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- reg
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- interrupts
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- clocks
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- dmas
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- dma-names
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unevaluatedProperties: false
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examples:
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- |
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#include <dt-bindings/clock/jz4770-cgu.h>
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spi@10043000 {
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compatible = "ingenic,jz4770-spi", "ingenic,jz4750-spi";
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reg = <0x10043000 0x1c>;
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#address-cells = <1>;
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#size-cells = <0>;
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interrupt-parent = <&intc>;
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interrupts = <8>;
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clocks = <&cgu JZ4770_CLK_SSI0>;
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dmas = <&dmac1 23 0xffffffff>, <&dmac1 22 0xffffffff>;
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dma-names = "rx", "tx";
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};

‎Documentation/devicetree/bindings/spi/qcom,spi-qcom-qspi.yaml‎

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properties:
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compatible:
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- const: qcom,sdm845-qspi
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- enum:
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- qcom,sc7180-qspi
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- qcom,sc7280-qspi
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- qcom,sdm845-qspi
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- const: qcom,qspi-v1
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reg:

‎Documentation/devicetree/bindings/spi/spi-nxp-fspi.txt‎

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This file was deleted.

‎Documentation/devicetree/bindings/spi/spi-nxp-fspi.yaml‎

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# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
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%YAML 1.2
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---
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$id: http://devicetree.org/schemas/spi/spi-nxp-fspi.yaml#
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$schema: http://devicetree.org/meta-schemas/core.yaml#
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title: NXP Flex Serial Peripheral Interface (FSPI)
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maintainers:
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- Kuldeep Singh <kuldeep.singh@nxp.com>
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allOf:
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- $ref: "spi-controller.yaml#"
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properties:
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compatible:
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enum:
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- nxp,imx8dxl-fspi
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- nxp,imx8mm-fspi
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- nxp,imx8mp-fspi
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- nxp,imx8qxp-fspi
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- nxp,lx2160a-fspi
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reg:
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items:
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- description: registers address space
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- description: memory mapped address space
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reg-names:
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items:
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- const: fspi_base
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- const: fspi_mmap
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interrupts:
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maxItems: 1
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clocks:
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items:
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- description: SPI bus clock
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- description: SPI serial clock
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clock-names:
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items:
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- const: fspi_en
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- const: fspi
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required:
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- compatible
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- reg
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- reg-names
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- interrupts
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- clocks
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- clock-names
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unevaluatedProperties: false
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examples:
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- |
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#include <dt-bindings/interrupt-controller/arm-gic.h>
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#include <dt-bindings/clock/fsl,qoriq-clockgen.h>
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soc {
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#address-cells = <2>;
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#size-cells = <2>;
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spi@20c0000 {
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compatible = "nxp,lx2160a-fspi";
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reg = <0x0 0x20c0000 0x0 0x100000>,
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<0x0 0x20000000 0x0 0x10000000>;
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reg-names = "fspi_base", "fspi_mmap";
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interrupts = <GIC_SPI 25 IRQ_TYPE_LEVEL_HIGH>;
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clocks = <&clockgen QORIQ_CLK_PLATFORM_PLL QORIQ_CLK_PLL_DIV(4)>,
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<&clockgen QORIQ_CLK_PLATFORM_PLL QORIQ_CLK_PLL_DIV(4)>;
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clock-names = "fspi_en", "fspi";
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#address-cells = <1>;
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#size-cells = <0>;
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flash@0 {
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compatible = "jedec,spi-nor";
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spi-max-frequency = <50000000>;
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reg = <0>;
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spi-rx-bus-width = <8>;
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spi-tx-bus-width = <8>;
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};
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};
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};

‎Documentation/spi/spi-summary.rst‎

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Non-static Configurations
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^^^^^^^^^^^^^^^^^^^^^^^^^
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Developer boards often play by different rules than product boards, and one
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example is the potential need to hotplug SPI devices and/or controllers.
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For those cases you might need to use spi_busnum_to_master() to look
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up the spi bus master, and will likely need spi_new_device() to provide the
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board info based on the board that was hotplugged. Of course, you'd later
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call at least spi_unregister_device() when that board is removed.
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When Linux includes support for MMC/SD/SDIO/DataFlash cards through SPI, those
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configurations will also be dynamic. Fortunately, such devices all support
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basic device identification probes, so they should hotplug normally.

‎MAINTAINERS‎

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R: Yogesh Gaur <yogeshgaur.83@gmail.com>
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L: linux-spi@vger.kernel.org
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S: Maintained
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F: Documentation/devicetree/bindings/spi/spi-nxp-fspi.txt
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F: Documentation/devicetree/bindings/spi/spi-nxp-fspi.yaml
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F: drivers/spi/spi-nxp-fspi.c
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NXP FXAS21002C DRIVER

‎arch/mips/boot/dts/ingenic/ci20.dts‎

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* Use the 32.768 kHz oscillator as the parent of the RTC for a higher
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* precision.
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*/
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assigned-clocks = <&cgu JZ4780_CLK_OTGPHY>, <&cgu JZ4780_CLK_RTC>;
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assigned-clock-parents = <0>, <&cgu JZ4780_CLK_RTCLK>;
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assigned-clock-rates = <48000000>;
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assigned-clocks = <&cgu JZ4780_CLK_OTGPHY>, <&cgu JZ4780_CLK_RTC>,
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<&cgu JZ4780_CLK_SSIPLL>, <&cgu JZ4780_CLK_SSI>;
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assigned-clock-parents = <0>, <&cgu JZ4780_CLK_RTCLK>,
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<&cgu JZ4780_CLK_MPLL>,
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<&cgu JZ4780_CLK_SSIPLL>;
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assigned-clock-rates = <48000000>, <0>, <54000000>;
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};
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&tcu {

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