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dt-bindings: i3c: Add AST2600 i3c controller
Add a devicetree binding for the ast2600 i3c controller hardware. This is heavily based on the designware i3c core, plus a reset facility and two platform-specific properties: - sda-pullup-ohms: to specify the value of the configurable pullup resistors on the SDA line - aspeed,global-regs: to reference the (ast2600-specific) i3c global register block, and the device index to use within it. Reviewed-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org> (on v1) Signed-off-by: Jeremy Kerr <jk@codeconstruct.com.au> Reviewed-by: Joel Stanley <joel@jms.id.au> Link: https://lore.kernel.org/r/20230331091501.3800299-3-jk@codeconstruct.com.au Signed-off-by: Alexandre Belloni <alexandre.belloni@bootlin.com>
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# SPDX-License-Identifier: GPL-2.0 OR BSD-2-Clause
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%YAML 1.2
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---
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$id: http://devicetree.org/schemas/i3c/aspeed,ast2600-i3c.yaml#
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$schema: http://devicetree.org/meta-schemas/core.yaml#
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title: ASPEED AST2600 i3c controller
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maintainers:
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- Jeremy Kerr <jk@codeconstruct.com.au>
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allOf:
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- $ref: i3c.yaml#
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properties:
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compatible:
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const: aspeed,ast2600-i3c
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reg:
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maxItems: 1
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clocks:
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maxItems: 1
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resets:
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maxItems: 1
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interrupts:
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maxItems: 1
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sda-pullup-ohms:
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enum: [545, 750, 2000]
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default: 2000
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description: |
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Value to configure SDA pullup resistor, in Ohms.
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aspeed,global-regs:
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$ref: /schemas/types.yaml#/definitions/phandle-array
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items:
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- items:
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- description: phandle to i3c global register syscon node
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- description: index of this i3c controller in the global register set
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description: |
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A (phandle, controller index) reference to the i3c global register set
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used for this device.
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required:
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- compatible
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- reg
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- clocks
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- interrupts
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- aspeed,global-regs
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unevaluatedProperties: false
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examples:
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- |
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#include <dt-bindings/interrupt-controller/arm-gic.h>
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i3c-master@2000 {
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compatible = "aspeed,ast2600-i3c";
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reg = <0x2000 0x1000>;
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#address-cells = <3>;
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#size-cells = <0>;
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clocks = <&syscon 0>;
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resets = <&syscon 0>;
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aspeed,global-regs = <&i3c_global 0>;
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pinctrl-names = "default";
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pinctrl-0 = <&pinctrl_i3c1_default>;
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interrupts = <GIC_SPI 102 IRQ_TYPE_LEVEL_HIGH>;
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};
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...

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