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i.MX ARM device tree changes for 6.20: - A few changes from Andreas Kemnade to correct LCDIF compatible for i.MX6SL/i.MX6SLL, add EPD regulator for imx6sll-kobo-clara2e, support TPS65185 for tolino-shine2 and e60k02 - A series from Frank Li to clean up GPMI CHECK_DTB warnings - A change from Alexander Stein to add default GIC address cells for imx6qdl - A change from Josua Mayer to add EPD PMIC for imx50-kobo-aura * tag 'imx-dt-6.20' of https://git.kernel.org/pub/scm/linux/kernel/git/shawnguo/linux: ARM: dts: imx: e60k02: add tps65185 ARM: dts: imx50-kobo-aura: add epd pmic description ARM: dts: imx: tolino-shine2: add tps65185 ARM: dts: imx: move nand related property under nand@0 ARM: dts: imx6sx: update gpmi #size-cells to 0 ARM: dts: imx6qdl: add '#address-cells' and '#size-cells' for gpmi-nand ARM: dts: imx: imx6sl: fix lcdif compatible ARM: dts: imx: imx6sll-kobo-clara2e: add regulator for EPD ARM: dts: imx: imx6sll: fix lcdif compatible ARM: dts: imx6qdl: Add default GIC address cells Signed-off-by: Arnd Bergmann <arnd@arndb.de>
2 parents 43b1d60 + f325a91 commit 21f3f6a

25 files changed

Lines changed: 347 additions & 29 deletions

‎arch/arm/boot/dts/nxp/imx/e60k02.dtsi‎

Lines changed: 34 additions & 1 deletion
Original file line numberDiff line numberDiff line change
@@ -23,6 +23,14 @@
2323
stdout-path = &uart1;
2424
};
2525

26+
epd_pmic_supply: regulator-epd-pmic-in {
27+
compatible = "regulator-fixed";
28+
regulator-name = "epd_pmic_supply";
29+
gpio = <&gpio2 14 GPIO_ACTIVE_HIGH>;
30+
enable-active-high;
31+
startup-delay-us = <20000>;
32+
};
33+
2634
gpio_keys: gpio-keys {
2735
compatible = "gpio-keys";
2836

@@ -119,8 +127,33 @@
119127
vdd-supply = <&ldo5_reg>;
120128
};
121129

122-
/* TODO: TPS65185 PMIC for E Ink at 0x68 */
130+
tps65185: pmic@68 {
131+
compatible = "ti,tps65185";
132+
reg = <0x68>;
133+
interrupt-parent = <&gpio2>;
134+
interrupts = <9 IRQ_TYPE_LEVEL_LOW>;
135+
vin-supply = <&epd_pmic_supply>;
136+
pwr-good-gpios = <&gpio2 13 GPIO_ACTIVE_HIGH>;
137+
vcom-ctrl-gpios = <&gpio2 3 GPIO_ACTIVE_HIGH>;
138+
wakeup-gpios = <&gpio2 7 GPIO_ACTIVE_HIGH>;
139+
enable-gpios = <&gpio2 8 GPIO_ACTIVE_HIGH>;
140+
141+
regulators {
142+
vcom_reg: vcom {
143+
regulator-name = "vcom";
144+
};
145+
146+
vposneg_reg: vposneg {
147+
regulator-name = "vposneg";
148+
regulator-min-microvolt = <15000000>;
149+
regulator-max-microvolt = <15000000>;
150+
};
123151

152+
v3p3_reg: v3p3 {
153+
regulator-name = "v3p3";
154+
};
155+
};
156+
};
124157
};
125158

126159
&i2c3 {

‎arch/arm/boot/dts/nxp/imx/imx50-kobo-aura.dts‎

Lines changed: 59 additions & 1 deletion
Original file line numberDiff line numberDiff line change
@@ -58,6 +58,16 @@
5858
};
5959
};
6060

61+
epd_pmic_supply: regulator-epd-pmic-in {
62+
compatible = "regulator-fixed";
63+
regulator-name = "epd_pmic_supply";
64+
gpio = <&gpio1 27 GPIO_ACTIVE_HIGH>;
65+
enable-active-high;
66+
startup-delay-us = <20000>;
67+
pinctrl-names = "default";
68+
pinctrl-0 = <&pinctrl_epd_pmic_supply>;
69+
};
70+
6171
sd2_pwrseq: pwrseq {
6272
compatible = "mmc-pwrseq-simple";
6373
pinctrl-names = "default";
@@ -135,7 +145,34 @@
135145
pinctrl-0 = <&pinctrl_i2c2>;
136146
status = "okay";
137147

138-
/* TODO: TPS65185 PMIC for E Ink at 0x68 */
148+
pmic@68 {
149+
compatible = "ti,tps65185";
150+
reg = <0x68>;
151+
pinctrl-names = "default";
152+
pinctrl-0 = <&pinctrl_epd_pmic>;
153+
pwr-good-gpios = <&gpio3 28 GPIO_ACTIVE_HIGH>;
154+
vcom-ctrl-gpios = <&gpio4 21 GPIO_ACTIVE_HIGH>;
155+
enable-gpios = <&gpio3 30 GPIO_ACTIVE_HIGH>;
156+
wakeup-gpios = <&gpio3 29 GPIO_ACTIVE_HIGH>;
157+
vin-supply = <&epd_pmic_supply>;
158+
interrupts-extended = <&gpio4 15 IRQ_TYPE_LEVEL_LOW>;
159+
160+
regulators {
161+
vcom {
162+
regulator-name = "vcom";
163+
};
164+
165+
vposneg {
166+
regulator-name = "vposneg";
167+
regulator-min-microvolt = <15000000>;
168+
regulator-max-microvolt = <15000000>;
169+
};
170+
171+
v3p3 {
172+
regulator-name = "v3p3";
173+
};
174+
};
175+
};
139176
};
140177

141178
&i2c3 {
@@ -161,6 +198,27 @@
161198
>;
162199
};
163200

201+
pinctrl_epd_pmic: epd-pmic-grp {
202+
fsl,pins = <
203+
/* PWRUP */
204+
MX50_PAD_EPDC_PWRCTRL1__GPIO3_30 0x0
205+
/* WAKEUP */
206+
MX50_PAD_EPDC_PWRCTRL0__GPIO3_29 0x0
207+
/* VCOMCTRL */
208+
MX50_PAD_EPDC_VCOM0__GPIO4_21 0x0
209+
/* PWRGOOD: enable internal 100k pull-up */
210+
MX50_PAD_EPDC_PWRSTAT__GPIO3_28 0xe0
211+
/* INT: enable internal 100k pull-up */
212+
MX50_PAD_ECSPI1_SS0__GPIO4_15 0xe0
213+
>;
214+
};
215+
216+
pinctrl_epd_pmic_supply: epd-pmic-supply-grp {
217+
fsl,pins = <
218+
MX50_PAD_EIM_CRE__GPIO1_27 0x0
219+
>;
220+
};
221+
164222
pinctrl_gpiokeys: gpiokeysgrp {
165223
fsl,pins = <
166224
MX50_PAD_CSPI_MISO__GPIO4_10 0x0

‎arch/arm/boot/dts/nxp/imx/imx6-logicpd-som.dtsi‎

Lines changed: 5 additions & 1 deletion
Original file line numberDiff line numberDiff line change
@@ -36,8 +36,12 @@
3636
&gpmi {
3737
pinctrl-names = "default";
3838
pinctrl-0 = <&pinctrl_gpmi_nand>;
39-
nand-on-flash-bbt;
4039
status = "okay";
40+
41+
nand@0 {
42+
reg = <0>;
43+
nand-on-flash-bbt;
44+
};
4145
};
4246

4347
&i2c3 {

‎arch/arm/boot/dts/nxp/imx/imx6qdl-icore.dtsi‎

Lines changed: 5 additions & 1 deletion
Original file line numberDiff line numberDiff line change
@@ -172,8 +172,12 @@
172172
&gpmi {
173173
pinctrl-names = "default";
174174
pinctrl-0 = <&pinctrl_gpmi_nand>;
175-
nand-on-flash-bbt;
176175
status = "okay";
176+
177+
nand@0 {
178+
reg = <0>;
179+
nand-on-flash-bbt;
180+
};
177181
};
178182

179183
&i2c1 {

‎arch/arm/boot/dts/nxp/imx/imx6qdl-phytec-pfla02.dtsi‎

Lines changed: 5 additions & 1 deletion
Original file line numberDiff line numberDiff line change
@@ -102,8 +102,12 @@
102102
&gpmi {
103103
pinctrl-names = "default";
104104
pinctrl-0 = <&pinctrl_gpmi_nand>;
105-
nand-on-flash-bbt;
106105
status = "okay";
106+
107+
nand@0 {
108+
reg = <0>;
109+
nand-on-flash-bbt;
110+
};
107111
};
108112

109113
&i2c1 {

‎arch/arm/boot/dts/nxp/imx/imx6qdl-phytec-phycore-som.dtsi‎

Lines changed: 5 additions & 1 deletion
Original file line numberDiff line numberDiff line change
@@ -73,8 +73,12 @@
7373
&gpmi {
7474
pinctrl-names = "default";
7575
pinctrl-0 = <&pinctrl_gpmi_nand>;
76-
nand-on-flash-bbt;
7776
status = "disabled";
77+
78+
nand@0 {
79+
reg = <0>;
80+
nand-on-flash-bbt;
81+
};
7882
};
7983

8084
&i2c3 {

‎arch/arm/boot/dts/nxp/imx/imx6qdl-skov-cpu.dtsi‎

Lines changed: 5 additions & 1 deletion
Original file line numberDiff line numberDiff line change
@@ -260,10 +260,14 @@
260260
&gpmi {
261261
pinctrl-names = "default";
262262
pinctrl-0 = <&pinctrl_gpmi_nand>;
263-
nand-on-flash-bbt;
264263
#address-cells = <1>;
265264
#size-cells = <0>;
266265
status = "okay";
266+
267+
nand@0 {
268+
reg = <0>;
269+
nand-on-flash-bbt;
270+
};
267271
};
268272

269273
&i2c3 {

‎arch/arm/boot/dts/nxp/imx/imx6qdl-tx6.dtsi‎

Lines changed: 5 additions & 1 deletion
Original file line numberDiff line numberDiff line change
@@ -252,9 +252,13 @@
252252
&gpmi {
253253
pinctrl-names = "default";
254254
pinctrl-0 = <&pinctrl_gpmi_nand>;
255-
nand-on-flash-bbt;
256255
fsl,no-blockmark-swap;
257256
status = "okay";
257+
258+
nand@0 {
259+
reg = <0>;
260+
nand-on-flash-bbt;
261+
};
258262
};
259263

260264
&i2c1 {

‎arch/arm/boot/dts/nxp/imx/imx6qdl.dtsi‎

Lines changed: 3 additions & 0 deletions
Original file line numberDiff line numberDiff line change
@@ -166,6 +166,8 @@
166166
compatible = "fsl,imx6q-gpmi-nand";
167167
reg = <0x00112000 0x2000>, <0x00114000 0x2000>;
168168
reg-names = "gpmi-nand", "bch";
169+
#address-cells = <1>;
170+
#size-cells = <0>;
169171
interrupts = <0 15 IRQ_TYPE_LEVEL_HIGH>;
170172
interrupt-names = "bch";
171173
clocks = <&clks IMX6QDL_CLK_GPMI_IO>,
@@ -875,6 +877,7 @@
875877
gpc: gpc@20dc000 {
876878
compatible = "fsl,imx6q-gpc";
877879
reg = <0x020dc000 0x4000>;
880+
#address-cells = <0>;
878881
interrupt-controller;
879882
#interrupt-cells = <3>;
880883
interrupts = <0 89 IRQ_TYPE_LEVEL_HIGH>;

‎arch/arm/boot/dts/nxp/imx/imx6sl-tolino-shine2hd.dts‎

Lines changed: 54 additions & 1 deletion
Original file line numberDiff line numberDiff line change
@@ -37,6 +37,16 @@
3737
stdout-path = &uart1;
3838
};
3939

40+
epd_pmic_supply: regulator-epd-pmic-in {
41+
compatible = "regulator-fixed";
42+
pinctrl-names = "default";
43+
pinctrl-0 = <&pinctrl_epd_pmic_supply>;
44+
regulator-name = "epd_pmic_supply";
45+
gpio = <&gpio2 14 GPIO_ACTIVE_HIGH>;
46+
enable-active-high;
47+
startup-delay-us = <20000>;
48+
};
49+
4050
gpio_keys: gpio-keys {
4151
compatible = "gpio-keys";
4252
pinctrl-names = "default";
@@ -147,8 +157,35 @@
147157
touchscreen-inverted-x;
148158
};
149159

150-
/* TODO: TPS65185 PMIC for E Ink at 0x68 */
160+
tps65185: pmic@68 {
161+
compatible = "ti,tps65185";
162+
pinctrl-names = "default";
163+
pinctrl-0 = <&pinctrl_tps65185_gpio>;
164+
reg = <0x68>;
165+
interrupt-parent = <&gpio2>;
166+
interrupts = <9 IRQ_TYPE_LEVEL_LOW>;
167+
vin-supply = <&epd_pmic_supply>;
168+
pwr-good-gpios = <&gpio2 13 GPIO_ACTIVE_HIGH>;
169+
vcom-ctrl-gpios = <&gpio2 3 GPIO_ACTIVE_HIGH>;
170+
wakeup-gpios = <&gpio2 7 GPIO_ACTIVE_HIGH>;
171+
enable-gpios = <&gpio2 8 GPIO_ACTIVE_HIGH>;
172+
173+
regulators {
174+
vcom_reg: vcom {
175+
regulator-name = "vcom";
176+
};
177+
178+
vposneg_reg: vposneg {
179+
regulator-name = "vposneg";
180+
regulator-min-microvolt = <15000000>;
181+
regulator-max-microvolt = <15000000>;
182+
};
151183

184+
v3p3_reg: v3p3 {
185+
regulator-name = "v3p3";
186+
};
187+
};
188+
};
152189
};
153190

154191
&i2c3 {
@@ -328,6 +365,12 @@
328365
>;
329366
};
330367

368+
pinctrl_epd_pmic_supply: epdc-pmic-supplygrp {
369+
fsl,pins = <
370+
MX6SL_PAD_EPDC_PWRWAKEUP__GPIO2_IO14 0x40010059 /* pwrall */
371+
>;
372+
};
373+
331374
pinctrl_gpio_keys: gpio-keysgrp {
332375
fsl,pins = <
333376
MX6SL_PAD_SD1_DAT1__GPIO5_IO08 0x17059
@@ -425,6 +468,16 @@
425468
>;
426469
};
427470

471+
pinctrl_tps65185_gpio: tps65185-gpio-grp {
472+
fsl,pins = <
473+
MX6SL_PAD_EPDC_VCOM0__GPIO2_IO03 0x40010059 /* vcom_ctrl */
474+
MX6SL_PAD_EPDC_PWRCTRL0__GPIO2_IO07 0x40010059 /* wakeup */
475+
MX6SL_PAD_EPDC_PWRCTRL1__GPIO2_IO08 0x40010059 /* enable */
476+
MX6SL_PAD_EPDC_PWRCTRL2__GPIO2_IO09 0x17059 /* nINT */
477+
MX6SL_PAD_EPDC_PWRSTAT__GPIO2_IO13 0x17059 /* pwr-good */
478+
>;
479+
};
480+
428481
pinctrl_uart1: uart1grp {
429482
fsl,pins = <
430483
MX6SL_PAD_UART1_TXD__UART1_TX_DATA 0x1b0b1

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