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firmware: qcom_scm: Refactor qcom_scm_pas_init_image()
Refactor qcom_scm_pas_init_image() by moving the memory allocation, copy, and free operations to a higher-level function, and isolate the actual SMC call in a separate function. The main intention is to allow flexibility for different allocators and to respect any constraints that the allocator API may impose before invoking the actual SCM function. Reviewed-by: Bryan O'Donoghue <bryan.odonoghue@linaro.org> Reviewed-by: Konrad Dybcio <konrad.dybcio@oss.qualcomm.com> Signed-off-by: Mukesh Ojha <mukesh.ojha@oss.qualcomm.com> Link: https://lore.kernel.org/r/20260105-kvmrprocv10-v10-9-022e96815380@oss.qualcomm.com Signed-off-by: Bjorn Andersson <andersson@kernel.org>
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1 file changed

Lines changed: 33 additions & 25 deletions

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drivers/firmware/qcom/qcom_scm.c

Lines changed: 33 additions & 25 deletions
Original file line numberDiff line numberDiff line change
@@ -592,6 +592,37 @@ struct qcom_scm_pas_context *devm_qcom_scm_pas_context_alloc(struct device *dev,
592592
}
593593
EXPORT_SYMBOL_GPL(devm_qcom_scm_pas_context_alloc);
594594

595+
static int __qcom_scm_pas_init_image(u32 pas_id, dma_addr_t mdata_phys,
596+
struct qcom_scm_res *res)
597+
{
598+
struct qcom_scm_desc desc = {
599+
.svc = QCOM_SCM_SVC_PIL,
600+
.cmd = QCOM_SCM_PIL_PAS_INIT_IMAGE,
601+
.arginfo = QCOM_SCM_ARGS(2, QCOM_SCM_VAL, QCOM_SCM_RW),
602+
.args[0] = pas_id,
603+
.owner = ARM_SMCCC_OWNER_SIP,
604+
};
605+
int ret;
606+
607+
ret = qcom_scm_clk_enable();
608+
if (ret)
609+
return ret;
610+
611+
ret = qcom_scm_bw_enable();
612+
if (ret)
613+
goto disable_clk;
614+
615+
desc.args[1] = mdata_phys;
616+
617+
ret = qcom_scm_call(__scm->dev, &desc, res);
618+
qcom_scm_bw_disable();
619+
620+
disable_clk:
621+
qcom_scm_clk_disable();
622+
623+
return ret;
624+
}
625+
595626
/**
596627
* qcom_scm_pas_init_image() - Initialize peripheral authentication service
597628
* state machine for a given peripheral, using the
@@ -612,17 +643,10 @@ EXPORT_SYMBOL_GPL(devm_qcom_scm_pas_context_alloc);
612643
int qcom_scm_pas_init_image(u32 pas_id, const void *metadata, size_t size,
613644
struct qcom_scm_pas_context *ctx)
614645
{
646+
struct qcom_scm_res res;
615647
dma_addr_t mdata_phys;
616648
void *mdata_buf;
617649
int ret;
618-
struct qcom_scm_desc desc = {
619-
.svc = QCOM_SCM_SVC_PIL,
620-
.cmd = QCOM_SCM_PIL_PAS_INIT_IMAGE,
621-
.arginfo = QCOM_SCM_ARGS(2, QCOM_SCM_VAL, QCOM_SCM_RW),
622-
.args[0] = pas_id,
623-
.owner = ARM_SMCCC_OWNER_SIP,
624-
};
625-
struct qcom_scm_res res;
626650

627651
/*
628652
* During the scm call memory protection will be enabled for the meta
@@ -643,23 +667,7 @@ int qcom_scm_pas_init_image(u32 pas_id, const void *metadata, size_t size,
643667

644668
memcpy(mdata_buf, metadata, size);
645669

646-
ret = qcom_scm_clk_enable();
647-
if (ret)
648-
goto out;
649-
650-
ret = qcom_scm_bw_enable();
651-
if (ret)
652-
goto disable_clk;
653-
654-
desc.args[1] = mdata_phys;
655-
656-
ret = qcom_scm_call(__scm->dev, &desc, &res);
657-
qcom_scm_bw_disable();
658-
659-
disable_clk:
660-
qcom_scm_clk_disable();
661-
662-
out:
670+
ret = __qcom_scm_pas_init_image(pas_id, mdata_phys, &res);
663671
if (ret < 0 || !ctx) {
664672
dma_free_coherent(__scm->dev, size, mdata_buf, mdata_phys);
665673
} else if (ctx) {

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