1616#endif
1717
1818#define MLX5_SFS_PER_CTRL_IRQ 64
19+ #define MLX5_MAX_MSIX_PER_SF 256
1920#define MLX5_IRQ_CTRL_SF_MAX 8
2021/* min num of vectors for SFs to be enabled */
2122#define MLX5_IRQ_VEC_COMP_BASE_SF 2
@@ -589,8 +590,6 @@ static void irq_pool_free(struct mlx5_irq_pool *pool)
589590static int irq_pools_init (struct mlx5_core_dev * dev , int sf_vec , int pcif_vec )
590591{
591592 struct mlx5_irq_table * table = dev -> priv .irq_table ;
592- int num_sf_ctrl_by_msix ;
593- int num_sf_ctrl_by_sfs ;
594593 int num_sf_ctrl ;
595594 int err ;
596595
@@ -608,10 +607,8 @@ static int irq_pools_init(struct mlx5_core_dev *dev, int sf_vec, int pcif_vec)
608607 }
609608
610609 /* init sf_ctrl_pool */
611- num_sf_ctrl_by_msix = DIV_ROUND_UP (sf_vec , MLX5_COMP_EQS_PER_SF );
612- num_sf_ctrl_by_sfs = DIV_ROUND_UP (mlx5_sf_max_functions (dev ),
613- MLX5_SFS_PER_CTRL_IRQ );
614- num_sf_ctrl = min_t (int , num_sf_ctrl_by_msix , num_sf_ctrl_by_sfs );
610+ num_sf_ctrl = DIV_ROUND_UP (mlx5_sf_max_functions (dev ),
611+ MLX5_SFS_PER_CTRL_IRQ );
615612 num_sf_ctrl = min_t (int , MLX5_IRQ_CTRL_SF_MAX , num_sf_ctrl );
616613 table -> sf_ctrl_pool = irq_pool_alloc (dev , pcif_vec , num_sf_ctrl ,
617614 "mlx5_sf_ctrl" ,
@@ -726,8 +723,7 @@ int mlx5_irq_table_create(struct mlx5_core_dev *dev)
726723
727724 total_vec = pcif_vec ;
728725 if (mlx5_sf_max_functions (dev ))
729- total_vec += MLX5_IRQ_CTRL_SF_MAX +
730- MLX5_COMP_EQS_PER_SF * mlx5_sf_max_functions (dev );
726+ total_vec += MLX5_MAX_MSIX_PER_SF * mlx5_sf_max_functions (dev );
731727 total_vec = min_t (int , total_vec , pci_msix_vec_count (dev -> pdev ));
732728 pcif_vec = min_t (int , pcif_vec , pci_msix_vec_count (dev -> pdev ));
733729
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