|
687 | 687 | reg = <0x0 0x3160000 0x0 0x100>; |
688 | 688 | status = "disabled"; |
689 | 689 | interrupts = <GIC_SPI 25 IRQ_TYPE_LEVEL_HIGH>; |
| 690 | + #address-cells = <1>; |
| 691 | + #size-cells = <0>; |
690 | 692 | clock-frequency = <400000>; |
691 | 693 | clocks = <&bpmp TEGRA234_CLK_I2C1 |
692 | 694 | &bpmp TEGRA234_CLK_PLLP_OUT0>; |
|
705 | 707 | compatible = "nvidia,tegra194-i2c"; |
706 | 708 | reg = <0x0 0x3180000 0x0 0x100>; |
707 | 709 | interrupts = <GIC_SPI 27 IRQ_TYPE_LEVEL_HIGH>; |
| 710 | + #address-cells = <1>; |
| 711 | + #size-cells = <0>; |
708 | 712 | status = "disabled"; |
709 | 713 | clock-frequency = <400000>; |
710 | 714 | clocks = <&bpmp TEGRA234_CLK_I2C3 |
|
724 | 728 | compatible = "nvidia,tegra194-i2c"; |
725 | 729 | reg = <0x0 0x3190000 0x0 0x100>; |
726 | 730 | interrupts = <GIC_SPI 28 IRQ_TYPE_LEVEL_HIGH>; |
| 731 | + #address-cells = <1>; |
| 732 | + #size-cells = <0>; |
727 | 733 | status = "disabled"; |
728 | 734 | clock-frequency = <100000>; |
729 | 735 | clocks = <&bpmp TEGRA234_CLK_I2C4 |
|
743 | 749 | compatible = "nvidia,tegra194-i2c"; |
744 | 750 | reg = <0x0 0x31b0000 0x0 0x100>; |
745 | 751 | interrupts = <GIC_SPI 30 IRQ_TYPE_LEVEL_HIGH>; |
| 752 | + #address-cells = <1>; |
| 753 | + #size-cells = <0>; |
746 | 754 | status = "disabled"; |
747 | 755 | clock-frequency = <100000>; |
748 | 756 | clocks = <&bpmp TEGRA234_CLK_I2C6 |
|
762 | 770 | compatible = "nvidia,tegra194-i2c"; |
763 | 771 | reg = <0x0 0x31c0000 0x0 0x100>; |
764 | 772 | interrupts = <GIC_SPI 31 IRQ_TYPE_LEVEL_HIGH>; |
| 773 | + #address-cells = <1>; |
| 774 | + #size-cells = <0>; |
765 | 775 | status = "disabled"; |
766 | 776 | clock-frequency = <100000>; |
767 | 777 | clocks = <&bpmp TEGRA234_CLK_I2C7 |
|
788 | 798 | compatible = "nvidia,tegra194-i2c"; |
789 | 799 | reg = <0x0 0x31e0000 0x0 0x100>; |
790 | 800 | interrupts = <GIC_SPI 33 IRQ_TYPE_LEVEL_HIGH>; |
| 801 | + #address-cells = <1>; |
| 802 | + #size-cells = <0>; |
791 | 803 | status = "disabled"; |
792 | 804 | clock-frequency = <100000>; |
793 | 805 | clocks = <&bpmp TEGRA234_CLK_I2C9 |
|
1654 | 1666 | compatible = "nvidia,tegra194-i2c"; |
1655 | 1667 | reg = <0x0 0xc240000 0x0 0x100>; |
1656 | 1668 | interrupts = <GIC_SPI 26 IRQ_TYPE_LEVEL_HIGH>; |
| 1669 | + #address-cells = <1>; |
| 1670 | + #size-cells = <0>; |
1657 | 1671 | status = "disabled"; |
1658 | 1672 | clock-frequency = <100000>; |
1659 | 1673 | clocks = <&bpmp TEGRA234_CLK_I2C2 |
|
1673 | 1687 | compatible = "nvidia,tegra194-i2c"; |
1674 | 1688 | reg = <0x0 0xc250000 0x0 0x100>; |
1675 | 1689 | interrupts = <GIC_SPI 32 IRQ_TYPE_LEVEL_HIGH>; |
| 1690 | + #address-cells = <1>; |
| 1691 | + #size-cells = <0>; |
1676 | 1692 | status = "disabled"; |
1677 | 1693 | clock-frequency = <400000>; |
1678 | 1694 | clocks = <&bpmp TEGRA234_CLK_I2C8 |
|
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