drm/i915/fbc: Fix the plane end Y offset check

We lost the required >>16 when I refactored the FBC plane state
checks. Bring it back so the check does what it's supposed to.

Cc: Mika Kahola <mika.kahola@intel.com>
Fixes: 2e6c99f ("drm/i915/fbc: Nuke lots of crap from intel_fbc_state_cache")
Signed-off-by: Ville Syrjälä <ville.syrjala@linux.intel.com>
Link: https://patchwork.freedesktop.org/patch/msgid/20220210103107.24492-1-ville.syrjala@linux.intel.com
Reviewed-by: Mika Kahola <mika.kahola@intel.com>
(cherry picked from commit f7bc440)
Signed-off-by: Tvrtko Ursulin <tvrtko.ursulin@intel.com>

Author: vsyrjala

drivers/gpu/drm/i915/display/intel_fbc.c

@@ -1115,7 +1115,8 @@ static int intel_fbc_check_plane(struct intel_atomic_state *state,
 
 	/* Wa_22010751166: icl, ehl, tgl, dg1, rkl */
 	if (DISPLAY_VER(i915) >= 11 &&
-	    (plane_state->view.color_plane[0].y + drm_rect_height(&plane_state->uapi.src)) & 3) {
+	    (plane_state->view.color_plane[0].y +
+	     (drm_rect_height(&plane_state->uapi.src) >> 16)) & 3) {
 		plane_state->no_fbc_reason = "plane end Y offset misaligned";
 		return false;
 	}