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Ben Skeggsairlied
Ben Skeggs
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airlied
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drm/nouveau/gsp: add hal for fifo.chan.alloc
570.86.16 has incompatible changes to NV_CHANNEL_ALLOC_PARAMS. At the same time, remove the duplicated channel allocation code from golden context init. Signed-off-by: Ben Skeggs <bskeggs@nvidia.com> Reviewed-by: Dave Airlie <airlied@redhat.com> Reviewed-by: Timur Tabi <ttabi@nvidia.com> Tested-by: Timur Tabi <ttabi@nvidia.com> Signed-off-by: Dave Airlie <airlied@redhat.com>
1 parent 37a82fa commit 27b13dc

3 files changed

Lines changed: 76 additions & 104 deletions

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‎drivers/gpu/drm/nouveau/nvkm/subdev/gsp/rm/r535/fifo.c‎

Lines changed: 61 additions & 42 deletions
Original file line numberDiff line numberDiff line change
@@ -70,50 +70,29 @@ r535_chan_ramfc_clear(struct nvkm_chan *chan)
7070
#define CHID_PER_USERD 8
7171

7272
static int
73-
r535_chan_ramfc_write(struct nvkm_chan *chan, u64 offset, u64 length, u32 devm, bool priv)
73+
r535_chan_alloc(struct nvkm_gsp_device *device, u32 handle, u32 nv2080_engine_type, u8 runq,
74+
bool priv, int chid, u64 inst_addr, u64 userd_addr, u64 mthdbuf_addr,
75+
struct nvkm_vmm *vmm, u64 gpfifo_offset, u32 gpfifo_length,
76+
struct nvkm_gsp_object *chan)
7477
{
75-
struct nvkm_fifo *fifo = chan->cgrp->runl->fifo;
76-
struct nvkm_engn *engn;
77-
struct nvkm_device *device = fifo->engine.subdev.device;
78+
struct nvkm_gsp *gsp = device->object.client->gsp;
79+
struct nvkm_fifo *fifo = gsp->subdev.device->fifo;
80+
const int userd_p = chid / CHID_PER_USERD;
81+
const int userd_i = chid % CHID_PER_USERD;
7882
NV_CHANNELGPFIFO_ALLOCATION_PARAMETERS *args;
79-
const int userd_p = chan->id / CHID_PER_USERD;
80-
const int userd_i = chan->id % CHID_PER_USERD;
81-
u32 eT = ~0;
82-
int ret;
8383

84-
if (unlikely(device->gr && !device->gr->engine.subdev.oneinit)) {
85-
ret = nvkm_subdev_oneinit(&device->gr->engine.subdev);
86-
if (ret)
87-
return ret;
88-
}
89-
90-
nvkm_runl_foreach_engn(engn, chan->cgrp->runl) {
91-
eT = engn->id;
92-
break;
93-
}
94-
95-
if (WARN_ON(eT == ~0))
96-
return -EINVAL;
97-
98-
chan->rm.mthdbuf.ptr = dma_alloc_coherent(fifo->engine.subdev.device->dev,
99-
fifo->rm.mthdbuf_size,
100-
&chan->rm.mthdbuf.addr, GFP_KERNEL);
101-
if (!chan->rm.mthdbuf.ptr)
102-
return -ENOMEM;
103-
104-
args = nvkm_gsp_rm_alloc_get(&chan->vmm->rm.device.object, NVKM_RM_CHAN(chan->id),
105-
fifo->func->chan.user.oclass, sizeof(*args),
106-
&chan->rm.object);
84+
args = nvkm_gsp_rm_alloc_get(&device->object, handle,
85+
fifo->func->chan.user.oclass, sizeof(*args), chan);
10786
if (WARN_ON(IS_ERR(args)))
10887
return PTR_ERR(args);
10988

110-
args->gpFifoOffset = offset;
111-
args->gpFifoEntries = length / 8;
89+
args->gpFifoOffset = gpfifo_offset;
90+
args->gpFifoEntries = gpfifo_length / 8;
11291

11392
args->flags = NVDEF(NVOS04, FLAGS, CHANNEL_TYPE, PHYSICAL);
11493
args->flags |= NVDEF(NVOS04, FLAGS, VPR, FALSE);
11594
args->flags |= NVDEF(NVOS04, FLAGS, CHANNEL_SKIP_MAP_REFCOUNTING, FALSE);
116-
args->flags |= NVVAL(NVOS04, FLAGS, GROUP_CHANNEL_RUNQUEUE, chan->runq);
95+
args->flags |= NVVAL(NVOS04, FLAGS, GROUP_CHANNEL_RUNQUEUE, runq);
11796
if (!priv)
11897
args->flags |= NVDEF(NVOS04, FLAGS, PRIVILEGED_CHANNEL, FALSE);
11998
else
@@ -136,25 +115,25 @@ r535_chan_ramfc_write(struct nvkm_chan *chan, u64 offset, u64 length, u32 devm,
136115
args->flags |= NVDEF(NVOS04, FLAGS, MAP_CHANNEL, FALSE);
137116
args->flags |= NVDEF(NVOS04, FLAGS, SKIP_CTXBUFFER_ALLOC, FALSE);
138117

139-
args->hVASpace = chan->vmm->rm.object.handle;
140-
args->engineType = eT;
118+
args->hVASpace = vmm->rm.object.handle;
119+
args->engineType = nv2080_engine_type;
141120

142-
args->instanceMem.base = chan->inst->addr;
143-
args->instanceMem.size = chan->inst->size;
121+
args->instanceMem.base = inst_addr;
122+
args->instanceMem.size = fifo->func->chan.func->inst->size;
144123
args->instanceMem.addressSpace = 2;
145124
args->instanceMem.cacheAttrib = 1;
146125

147-
args->userdMem.base = nvkm_memory_addr(chan->userd.mem) + chan->userd.base;
126+
args->userdMem.base = userd_addr;
148127
args->userdMem.size = fifo->func->chan.func->userd->size;
149128
args->userdMem.addressSpace = 2;
150129
args->userdMem.cacheAttrib = 1;
151130

152-
args->ramfcMem.base = chan->inst->addr + 0;
131+
args->ramfcMem.base = inst_addr;
153132
args->ramfcMem.size = 0x200;
154133
args->ramfcMem.addressSpace = 2;
155134
args->ramfcMem.cacheAttrib = 1;
156135

157-
args->mthdbufMem.base = chan->rm.mthdbuf.addr;
136+
args->mthdbufMem.base = mthdbuf_addr;
158137
args->mthdbufMem.size = fifo->rm.mthdbuf_size;
159138
args->mthdbufMem.addressSpace = 1;
160139
args->mthdbufMem.cacheAttrib = 0;
@@ -166,7 +145,44 @@ r535_chan_ramfc_write(struct nvkm_chan *chan, u64 offset, u64 length, u32 devm,
166145
args->internalFlags |= NVDEF(NV_KERNELCHANNEL, ALLOC_INTERNALFLAGS, ERROR_NOTIFIER_TYPE, NONE);
167146
args->internalFlags |= NVDEF(NV_KERNELCHANNEL, ALLOC_INTERNALFLAGS, ECC_ERROR_NOTIFIER_TYPE, NONE);
168147

169-
ret = nvkm_gsp_rm_alloc_wr(&chan->rm.object, args);
148+
return nvkm_gsp_rm_alloc_wr(chan, args);
149+
}
150+
151+
static int
152+
r535_chan_ramfc_write(struct nvkm_chan *chan, u64 offset, u64 length, u32 devm, bool priv)
153+
{
154+
struct nvkm_fifo *fifo = chan->cgrp->runl->fifo;
155+
struct nvkm_engn *engn;
156+
struct nvkm_device *device = fifo->engine.subdev.device;
157+
const struct nvkm_rm_api *rmapi = device->gsp->rm->api;
158+
u32 eT = ~0;
159+
int ret;
160+
161+
if (unlikely(device->gr && !device->gr->engine.subdev.oneinit)) {
162+
ret = nvkm_subdev_oneinit(&device->gr->engine.subdev);
163+
if (ret)
164+
return ret;
165+
}
166+
167+
nvkm_runl_foreach_engn(engn, chan->cgrp->runl) {
168+
eT = engn->id;
169+
break;
170+
}
171+
172+
if (WARN_ON(eT == ~0))
173+
return -EINVAL;
174+
175+
chan->rm.mthdbuf.ptr = dma_alloc_coherent(fifo->engine.subdev.device->dev,
176+
fifo->rm.mthdbuf_size,
177+
&chan->rm.mthdbuf.addr, GFP_KERNEL);
178+
if (!chan->rm.mthdbuf.ptr)
179+
return -ENOMEM;
180+
181+
ret = rmapi->fifo->chan.alloc(&chan->vmm->rm.device, NVKM_RM_CHAN(chan->id),
182+
eT, chan->runq, priv, chan->id, chan->inst->addr,
183+
nvkm_memory_addr(chan->userd.mem) + chan->userd.base,
184+
chan->rm.mthdbuf.addr, chan->vmm, offset, length,
185+
&chan->rm.object);
170186
if (ret)
171187
return ret;
172188

@@ -541,4 +557,7 @@ const struct nvkm_rm_api_fifo
541557
r535_fifo = {
542558
.xlat_rm_engine_type = r535_fifo_xlat_rm_engine_type,
543559
.ectx_size = r535_fifo_ectx_size,
560+
.chan = {
561+
.alloc = r535_chan_alloc,
562+
},
544563
};

‎drivers/gpu/drm/nouveau/nvkm/subdev/gsp/rm/r535/gr.c‎

Lines changed: 8 additions & 62 deletions
Original file line numberDiff line numberDiff line change
@@ -298,74 +298,20 @@ r535_gr_oneinit(struct nvkm_gr *base)
298298
if (ret)
299299
goto done;
300300

301-
{
302-
NV_CHANNELGPFIFO_ALLOCATION_PARAMETERS *args;
303-
304-
args = nvkm_gsp_rm_alloc_get(&golden.vmm->rm.device.object, NVKM_RM_CHAN(0),
305-
device->fifo->func->chan.user.oclass,
306-
sizeof(*args), &golden.chan);
307-
if (IS_ERR(args)) {
308-
ret = PTR_ERR(args);
309-
goto done;
310-
}
311-
312-
args->gpFifoOffset = 0;
313-
args->gpFifoEntries = 0x1000 / 8;
314-
args->flags =
315-
NVDEF(NVOS04, FLAGS, CHANNEL_TYPE, PHYSICAL) |
316-
NVDEF(NVOS04, FLAGS, VPR, FALSE) |
317-
NVDEF(NVOS04, FLAGS, CHANNEL_SKIP_MAP_REFCOUNTING, FALSE) |
318-
NVVAL(NVOS04, FLAGS, GROUP_CHANNEL_RUNQUEUE, 0) |
319-
NVDEF(NVOS04, FLAGS, PRIVILEGED_CHANNEL, TRUE) |
320-
NVDEF(NVOS04, FLAGS, DELAY_CHANNEL_SCHEDULING, FALSE) |
321-
NVDEF(NVOS04, FLAGS, CHANNEL_DENY_PHYSICAL_MODE_CE, FALSE) |
322-
NVVAL(NVOS04, FLAGS, CHANNEL_USERD_INDEX_VALUE, 0) |
323-
NVDEF(NVOS04, FLAGS, CHANNEL_USERD_INDEX_FIXED, FALSE) |
324-
NVVAL(NVOS04, FLAGS, CHANNEL_USERD_INDEX_PAGE_VALUE, 0) |
325-
NVDEF(NVOS04, FLAGS, CHANNEL_USERD_INDEX_PAGE_FIXED, TRUE) |
326-
NVDEF(NVOS04, FLAGS, CHANNEL_DENY_AUTH_LEVEL_PRIV, FALSE) |
327-
NVDEF(NVOS04, FLAGS, CHANNEL_SKIP_SCRUBBER, FALSE) |
328-
NVDEF(NVOS04, FLAGS, CHANNEL_CLIENT_MAP_FIFO, FALSE) |
329-
NVDEF(NVOS04, FLAGS, SET_EVICT_LAST_CE_PREFETCH_CHANNEL, FALSE) |
330-
NVDEF(NVOS04, FLAGS, CHANNEL_VGPU_PLUGIN_CONTEXT, FALSE) |
331-
NVDEF(NVOS04, FLAGS, CHANNEL_PBDMA_ACQUIRE_TIMEOUT, FALSE) |
332-
NVDEF(NVOS04, FLAGS, GROUP_CHANNEL_THREAD, DEFAULT) |
333-
NVDEF(NVOS04, FLAGS, MAP_CHANNEL, FALSE) |
334-
NVDEF(NVOS04, FLAGS, SKIP_CTXBUFFER_ALLOC, FALSE);
335-
args->hVASpace = golden.vmm->rm.object.handle;
336-
args->engineType = 1;
337-
args->instanceMem.base = nvkm_memory_addr(golden.inst);
338-
args->instanceMem.size = 0x1000;
339-
args->instanceMem.addressSpace = 2;
340-
args->instanceMem.cacheAttrib = 1;
341-
args->ramfcMem.base = nvkm_memory_addr(golden.inst);
342-
args->ramfcMem.size = 0x200;
343-
args->ramfcMem.addressSpace = 2;
344-
args->ramfcMem.cacheAttrib = 1;
345-
args->userdMem.base = nvkm_memory_addr(golden.inst) + 0x1000;
346-
args->userdMem.size = 0x200;
347-
args->userdMem.addressSpace = 2;
348-
args->userdMem.cacheAttrib = 1;
349-
args->mthdbufMem.base = nvkm_memory_addr(golden.inst) + 0x2000;
350-
args->mthdbufMem.size = 0x5000;
351-
args->mthdbufMem.addressSpace = 2;
352-
args->mthdbufMem.cacheAttrib = 1;
353-
args->internalFlags =
354-
NVDEF(NV_KERNELCHANNEL, ALLOC_INTERNALFLAGS, PRIVILEGE, ADMIN) |
355-
NVDEF(NV_KERNELCHANNEL, ALLOC_INTERNALFLAGS, ERROR_NOTIFIER_TYPE, NONE) |
356-
NVDEF(NV_KERNELCHANNEL, ALLOC_INTERNALFLAGS, ECC_ERROR_NOTIFIER_TYPE, NONE);
357-
358-
ret = nvkm_gsp_rm_alloc_wr(&golden.chan, args);
359-
if (ret)
360-
goto done;
361-
}
301+
ret = rm->api->fifo->chan.alloc(&golden.vmm->rm.device, NVKM_RM_CHAN(0), 1, 0, true, 0,
302+
nvkm_memory_addr(golden.inst),
303+
nvkm_memory_addr(golden.inst) + 0x1000,
304+
nvkm_memory_addr(golden.inst) + 0x2000,
305+
golden.vmm, 0, 0x1000, &golden.chan);
306+
if (ret)
307+
goto done;
362308

363309
/* Fetch context buffer info from RM and allocate each of them here to use
364310
* during golden context init (or later as a global context buffer).
365311
*
366312
* Also build the information that'll be used to create channel contexts.
367313
*/
368-
ret = gsp->rm->api->gr->get_ctxbufs_info(gr);
314+
ret = rm->api->gr->get_ctxbufs_info(gr);
369315
if (ret)
370316
goto done;
371317

‎drivers/gpu/drm/nouveau/nvkm/subdev/gsp/rm/rm.h‎

Lines changed: 7 additions & 0 deletions
Original file line numberDiff line numberDiff line change
@@ -101,6 +101,13 @@ struct nvkm_rm_api {
101101
int (*xlat_rm_engine_type)(u32 rm_engine_type,
102102
enum nvkm_subdev_type *, int *nv2080_type);
103103
int (*ectx_size)(struct nvkm_fifo *);
104+
struct {
105+
int (*alloc)(struct nvkm_gsp_device *, u32 handle,
106+
u32 nv2080_engine_type, u8 runq, bool priv, int chid,
107+
u64 inst_addr, u64 userd_addr, u64 mthdbuf_addr,
108+
struct nvkm_vmm *, u64 gpfifo_offset, u32 gpfifo_length,
109+
struct nvkm_gsp_object *);
110+
} chan;
104111
} *fifo;
105112

106113
const struct nvkm_rm_api_engine {

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