iommu/amd: Do not set the D bit on AMD v2 table entries

jgunthorpe · joergroedel · commit 2910a7fa1be0 · 2024-09-04T11:39:03.000+02:00
The manual says that bit 6 is IGN for all Page-Table Base Address pointers, don't set it. Fixes: aaac38f ("iommu/amd: Initial support for AMD IOMMU v2 page table") Reviewed-by: Vasant Hegde <vasant.hegde@amd.com> Signed-off-by: Jason Gunthorpe <jgg@nvidia.com> Link: https://lore.kernel.org/r/14-v2-831cdc4d00f3+1a315-amd_iopgtbl_jgg@nvidia.com Signed-off-by: Joerg Roedel <jroedel@suse.de>
diff --git a/drivers/iommu/amd/io_pgtable_v2.c b/drivers/iommu/amd/io_pgtable_v2.c
@@ -51,7 +51,7 @@ static inline u64 set_pgtable_attr(u64 *page)
 	u64 prot;
 
 	prot = IOMMU_PAGE_PRESENT | IOMMU_PAGE_RW | IOMMU_PAGE_USER;
-	prot |= IOMMU_PAGE_ACCESS | IOMMU_PAGE_DIRTY;
+	prot |= IOMMU_PAGE_ACCESS;
 
 	return (iommu_virt_to_phys(page) | prot);
 }

Original file line number	Diff line number	Diff line change
`@@ -51,7 +51,7 @@ static inline u64 set_pgtable_attr(u64 *page)`
`51`	`51`	`u64 prot;`
`52`	`52`
`53`	`53`	`prot = IOMMU_PAGE_PRESENT \| IOMMU_PAGE_RW \| IOMMU_PAGE_USER;`
`54`		`- prot \|= IOMMU_PAGE_ACCESS \| IOMMU_PAGE_DIRTY;`
	`54`	`+ prot \|= IOMMU_PAGE_ACCESS;`
`55`	`55`
`56`	`56`	`return (iommu_virt_to_phys(page) \| prot);`
`57`	`57`	`}`