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Merge pull request #654 from ojeda/sync
Sync with v5.17-rc2
2 parents 4aa73fd + d286bfe commit 29fd422

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‎.mailmap‎

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@@ -70,6 +70,7 @@ Boris Brezillon <bbrezillon@kernel.org> <boris.brezillon@bootlin.com>
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Boris Brezillon <bbrezillon@kernel.org> <boris.brezillon@free-electrons.com>
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Brian Avery <b.avery@hp.com>
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Brian King <brking@us.ibm.com>
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Brian Silverman <bsilver16384@gmail.com> <brian.silverman@bluerivertech.com>
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Changbin Du <changbin.du@intel.com> <changbin.du@gmail.com>
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Changbin Du <changbin.du@intel.com> <changbin.du@intel.com>
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Chao Yu <chao@kernel.org> <chao2.yu@samsung.com>

‎Documentation/accounting/psi.rst‎

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@@ -92,7 +92,8 @@ Triggers can be set on more than one psi metric and more than one trigger
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for the same psi metric can be specified. However for each trigger a separate
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file descriptor is required to be able to poll it separately from others,
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therefore for each trigger a separate open() syscall should be made even
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when opening the same psi interface file.
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when opening the same psi interface file. Write operations to a file descriptor
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with an already existing psi trigger will fail with EBUSY.
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Monitors activate only when system enters stall state for the monitored
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psi metric and deactivates upon exit from the stall state. While system is

‎Documentation/admin-guide/gpio/index.rst‎

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@@ -10,6 +10,7 @@ gpio
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gpio-aggregator
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sysfs
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gpio-mockup
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gpio-sim
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.. only:: subproject and html
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‎Documentation/arm/marvell.rst‎

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@@ -266,10 +266,12 @@ Avanta family
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-------------
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Flavors:
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- 88F6500
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- 88F6510
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- 88F6530P
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- 88F6550
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- 88F6560
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- 88F6601
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Homepage:
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https://web.archive.org/web/20181005145041/http://www.marvell.com/broadband/

‎Documentation/arm64/silicon-errata.rst‎

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@@ -52,6 +52,12 @@ stable kernels.
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| Allwinner | A64/R18 | UNKNOWN1 | SUN50I_ERRATUM_UNKNOWN1 |
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+----------------+-----------------+-----------------+-----------------------------+
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+----------------+-----------------+-----------------+-----------------------------+
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| ARM | Cortex-A510 | #2064142 | ARM64_ERRATUM_2064142 |
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+----------------+-----------------+-----------------+-----------------------------+
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| ARM | Cortex-A510 | #2038923 | ARM64_ERRATUM_2038923 |
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+----------------+-----------------+-----------------+-----------------------------+
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| ARM | Cortex-A510 | #1902691 | ARM64_ERRATUM_1902691 |
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+----------------+-----------------+-----------------+-----------------------------+
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| ARM | Cortex-A53 | #826319 | ARM64_ERRATUM_826319 |
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+----------------+-----------------+-----------------+-----------------------------+
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| ARM | Cortex-A53 | #827319 | ARM64_ERRATUM_827319 |
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+----------------+-----------------+-----------------+-----------------------------+
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| ARM | Cortex-A77 | #1508412 | ARM64_ERRATUM_1508412 |
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+----------------+-----------------+-----------------+-----------------------------+
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| ARM | Cortex-A510 | #2051678 | ARM64_ERRATUM_2051678 |
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+----------------+-----------------+-----------------+-----------------------------+
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| ARM | Cortex-A710 | #2119858 | ARM64_ERRATUM_2119858 |
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+----------------+-----------------+-----------------+-----------------------------+
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| ARM | Cortex-A710 | #2054223 | ARM64_ERRATUM_2054223 |
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+----------------+-----------------+-----------------+-----------------------------+
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| ARM | Cortex-A710 | #2224489 | ARM64_ERRATUM_2224489 |
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+----------------+-----------------+-----------------+-----------------------------+
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| ARM | Cortex-X2 | #2119858 | ARM64_ERRATUM_2119858 |
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+----------------+-----------------+-----------------+-----------------------------+
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| ARM | Cortex-X2 | #2224489 | ARM64_ERRATUM_2224489 |
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+----------------+-----------------+-----------------+-----------------------------+
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| ARM | Neoverse-N1 | #1188873,1418040| ARM64_ERRATUM_1418040 |
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+----------------+-----------------+-----------------+-----------------------------+
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| ARM | Neoverse-N1 | #1349291 | N/A |

‎Documentation/devicetree/bindings/interrupt-controller/renesas,irqc.yaml‎

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- renesas,intc-ex-r8a77980 # R-Car V3H
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- renesas,intc-ex-r8a77990 # R-Car E3
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- renesas,intc-ex-r8a77995 # R-Car D3
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- renesas,intc-ex-r8a779a0 # R-Car V3U
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- const: renesas,irqc
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'#interrupt-cells':

‎Documentation/devicetree/bindings/interrupt-controller/sifive,plic-1.0.0.yaml‎

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interrupts-extended:
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minItems: 1
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maxItems: 15872
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description:
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Specifies which contexts are connected to the PLIC, with "-1" specifying
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that a context is not present. Each node pointed to should be a
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#interrupt-cells = <1>;
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compatible = "sifive,fu540-c000-plic", "sifive,plic-1.0.0";
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interrupt-controller;
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interrupts-extended = <
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&cpu0_intc 11
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&cpu1_intc 11 &cpu1_intc 9
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&cpu2_intc 11 &cpu2_intc 9
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&cpu3_intc 11 &cpu3_intc 9
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&cpu4_intc 11 &cpu4_intc 9>;
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interrupts-extended = <&cpu0_intc 11>,
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<&cpu1_intc 11>, <&cpu1_intc 9>,
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<&cpu2_intc 11>, <&cpu2_intc 9>,
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<&cpu3_intc 11>, <&cpu3_intc 9>,
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<&cpu4_intc 11>, <&cpu4_intc 9>;
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reg = <0xc000000 0x4000000>;
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riscv,ndev = <10>;
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};

‎Documentation/devicetree/bindings/net/can/tcan4x5x.txt‎

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#address-cells = <1>;
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#size-cells = <1>;
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spi-max-frequency = <10000000>;
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bosch,mram-cfg = <0x0 0 0 32 0 0 1 1>;
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bosch,mram-cfg = <0x0 0 0 16 0 0 1 1>;
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interrupt-parent = <&gpio1>;
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interrupts = <14 IRQ_TYPE_LEVEL_LOW>;
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device-state-gpios = <&gpio3 21 GPIO_ACTIVE_HIGH>;

‎Documentation/index.rst‎

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.. toctree::
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:maxdepth: 2
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tools/index
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staging/index
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watch_queue
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‎Documentation/kernel-hacking/locking.rst‎

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- If you are in a process context (any syscall) and want to lock other
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process out, use a mutex. You can take a mutex and sleep
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(``copy_from_user*(`` or ``kmalloc(x,GFP_KERNEL)``).
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(``copy_from_user()`` or ``kmalloc(x,GFP_KERNEL)``).
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- Otherwise (== data can be touched in an interrupt), use
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spin_lock_irqsave() and

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