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XBurstLinus Walleij
XBurst
authored and
Linus Walleij
committed
pinctrl: Ingenic: Add pinctrl driver for X2100.
Add support for probing the pinctrl-ingenic driver on the X2100 SoC from Ingenic. Signed-off-by: 周琰杰 (Zhou Yanjie) <zhouyanjie@wanyeetech.com> Link: https://lore.kernel.org/r/1627108604-91304-5-git-send-email-zhouyanjie@wanyeetech.com Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
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‎drivers/pinctrl/pinctrl-ingenic.c‎

Lines changed: 216 additions & 0 deletions
Original file line numberDiff line numberDiff line change
@@ -104,6 +104,7 @@ enum jz_version {
104104
ID_X1500,
105105
ID_X1830,
106106
ID_X2000,
107+
ID_X2100,
107108
};
108109

109110
struct ingenic_chip_info {
@@ -2980,6 +2981,216 @@ static const struct ingenic_chip_info x2000_chip_info = {
29802981
.pull_downs = x2000_pull_downs,
29812982
};
29822983

2984+
static const u32 x2100_pull_ups[5] = {
2985+
0x0003ffff, 0xffffffff, 0x1ff0ffff, 0xc7fe3f3f, 0x0fbf003f,
2986+
};
2987+
2988+
static const u32 x2100_pull_downs[5] = {
2989+
0x0003ffff, 0xffffffff, 0x1ff0ffff, 0x00000000, 0x0fbf003f,
2990+
};
2991+
2992+
static int x2100_mac_pins[] = {
2993+
0x4b, 0x47, 0x46, 0x4a, 0x43, 0x42, 0x4c, 0x4d, 0x4f, 0x41,
2994+
};
2995+
2996+
static const struct group_desc x2100_groups[] = {
2997+
INGENIC_PIN_GROUP("uart0-data", x2000_uart0_data, 2),
2998+
INGENIC_PIN_GROUP("uart0-hwflow", x2000_uart0_hwflow, 2),
2999+
INGENIC_PIN_GROUP("uart1-data", x2000_uart1_data, 1),
3000+
INGENIC_PIN_GROUP("uart1-hwflow", x2000_uart1_hwflow, 1),
3001+
INGENIC_PIN_GROUP("uart2-data", x2000_uart2_data, 0),
3002+
INGENIC_PIN_GROUP("uart3-data-c", x2000_uart3_data_c, 0),
3003+
INGENIC_PIN_GROUP("uart3-data-d", x2000_uart3_data_d, 1),
3004+
INGENIC_PIN_GROUP("uart3-hwflow-c", x2000_uart3_hwflow_c, 0),
3005+
INGENIC_PIN_GROUP("uart3-hwflow-d", x2000_uart3_hwflow_d, 1),
3006+
INGENIC_PIN_GROUP("uart4-data-a", x2000_uart4_data_a, 1),
3007+
INGENIC_PIN_GROUP("uart4-data-c", x2000_uart4_data_c, 3),
3008+
INGENIC_PIN_GROUP("uart4-hwflow-a", x2000_uart4_hwflow_a, 1),
3009+
INGENIC_PIN_GROUP("uart4-hwflow-c", x2000_uart4_hwflow_c, 3),
3010+
INGENIC_PIN_GROUP("uart5-data-a", x2000_uart5_data_a, 1),
3011+
INGENIC_PIN_GROUP("uart5-data-c", x2000_uart5_data_c, 3),
3012+
INGENIC_PIN_GROUP("uart6-data-a", x2000_uart6_data_a, 1),
3013+
INGENIC_PIN_GROUP("uart6-data-c", x2000_uart6_data_c, 3),
3014+
INGENIC_PIN_GROUP("uart7-data-a", x2000_uart7_data_a, 1),
3015+
INGENIC_PIN_GROUP("uart7-data-c", x2000_uart7_data_c, 3),
3016+
INGENIC_PIN_GROUP("uart8-data", x2000_uart8_data, 3),
3017+
INGENIC_PIN_GROUP("uart9-data", x2000_uart9_data, 3),
3018+
INGENIC_PIN_GROUP("sfc-data-if0-d", x2000_sfc_data_if0_d, 1),
3019+
INGENIC_PIN_GROUP("sfc-data-if0-e", x2000_sfc_data_if0_e, 0),
3020+
INGENIC_PIN_GROUP("sfc-data-if1", x2000_sfc_data_if1, 1),
3021+
INGENIC_PIN_GROUP("sfc-clk-d", x2000_sfc_clk_d, 1),
3022+
INGENIC_PIN_GROUP("sfc-clk-e", x2000_sfc_clk_e, 0),
3023+
INGENIC_PIN_GROUP("sfc-ce-d", x2000_sfc_ce_d, 1),
3024+
INGENIC_PIN_GROUP("sfc-ce-e", x2000_sfc_ce_e, 0),
3025+
INGENIC_PIN_GROUP("ssi0-dt-b", x2000_ssi0_dt_b, 1),
3026+
INGENIC_PIN_GROUP("ssi0-dt-d", x2000_ssi0_dt_d, 1),
3027+
INGENIC_PIN_GROUP("ssi0-dr-b", x2000_ssi0_dr_b, 1),
3028+
INGENIC_PIN_GROUP("ssi0-dr-d", x2000_ssi0_dr_d, 1),
3029+
INGENIC_PIN_GROUP("ssi0-clk-b", x2000_ssi0_clk_b, 1),
3030+
INGENIC_PIN_GROUP("ssi0-clk-d", x2000_ssi0_clk_d, 1),
3031+
INGENIC_PIN_GROUP("ssi0-ce-b", x2000_ssi0_ce_b, 1),
3032+
INGENIC_PIN_GROUP("ssi0-ce-d", x2000_ssi0_ce_d, 1),
3033+
INGENIC_PIN_GROUP("ssi1-dt-c", x2000_ssi1_dt_c, 2),
3034+
INGENIC_PIN_GROUP("ssi1-dt-d", x2000_ssi1_dt_d, 2),
3035+
INGENIC_PIN_GROUP("ssi1-dt-e", x2000_ssi1_dt_e, 1),
3036+
INGENIC_PIN_GROUP("ssi1-dr-c", x2000_ssi1_dr_c, 2),
3037+
INGENIC_PIN_GROUP("ssi1-dr-d", x2000_ssi1_dr_d, 2),
3038+
INGENIC_PIN_GROUP("ssi1-dr-e", x2000_ssi1_dr_e, 1),
3039+
INGENIC_PIN_GROUP("ssi1-clk-c", x2000_ssi1_clk_c, 2),
3040+
INGENIC_PIN_GROUP("ssi1-clk-d", x2000_ssi1_clk_d, 2),
3041+
INGENIC_PIN_GROUP("ssi1-clk-e", x2000_ssi1_clk_e, 1),
3042+
INGENIC_PIN_GROUP("ssi1-ce-c", x2000_ssi1_ce_c, 2),
3043+
INGENIC_PIN_GROUP("ssi1-ce-d", x2000_ssi1_ce_d, 2),
3044+
INGENIC_PIN_GROUP("ssi1-ce-e", x2000_ssi1_ce_e, 1),
3045+
INGENIC_PIN_GROUP("mmc0-1bit", x2000_mmc0_1bit, 0),
3046+
INGENIC_PIN_GROUP("mmc0-4bit", x2000_mmc0_4bit, 0),
3047+
INGENIC_PIN_GROUP("mmc0-8bit", x2000_mmc0_8bit, 0),
3048+
INGENIC_PIN_GROUP("mmc1-1bit", x2000_mmc1_1bit, 0),
3049+
INGENIC_PIN_GROUP("mmc1-4bit", x2000_mmc1_4bit, 0),
3050+
INGENIC_PIN_GROUP("mmc2-1bit", x2000_mmc2_1bit, 0),
3051+
INGENIC_PIN_GROUP("mmc2-4bit", x2000_mmc2_4bit, 0),
3052+
INGENIC_PIN_GROUP("emc-8bit-data", x2000_emc_8bit_data, 0),
3053+
INGENIC_PIN_GROUP("emc-16bit-data", x2000_emc_16bit_data, 0),
3054+
INGENIC_PIN_GROUP("emc-addr", x2000_emc_addr, 0),
3055+
INGENIC_PIN_GROUP("emc-rd-we", x2000_emc_rd_we, 0),
3056+
INGENIC_PIN_GROUP("emc-wait", x2000_emc_wait, 0),
3057+
INGENIC_PIN_GROUP("emc-cs1", x2000_emc_cs1, 3),
3058+
INGENIC_PIN_GROUP("emc-cs2", x2000_emc_cs2, 3),
3059+
INGENIC_PIN_GROUP("i2c0-data", x2000_i2c0, 3),
3060+
INGENIC_PIN_GROUP("i2c1-data-c", x2000_i2c1_c, 2),
3061+
INGENIC_PIN_GROUP("i2c1-data-d", x2000_i2c1_d, 1),
3062+
INGENIC_PIN_GROUP("i2c2-data-b", x2000_i2c2_b, 2),
3063+
INGENIC_PIN_GROUP("i2c2-data-d", x2000_i2c2_d, 2),
3064+
INGENIC_PIN_GROUP("i2c2-data-e", x2000_i2c2_e, 1),
3065+
INGENIC_PIN_GROUP("i2c3-data-a", x2000_i2c3_a, 0),
3066+
INGENIC_PIN_GROUP("i2c3-data-d", x2000_i2c3_d, 1),
3067+
INGENIC_PIN_GROUP("i2c4-data-c", x2000_i2c4_c, 1),
3068+
INGENIC_PIN_GROUP("i2c4-data-d", x2000_i2c4_d, 2),
3069+
INGENIC_PIN_GROUP("i2c5-data-c", x2000_i2c5_c, 1),
3070+
INGENIC_PIN_GROUP("i2c5-data-d", x2000_i2c5_d, 1),
3071+
INGENIC_PIN_GROUP("i2s1-data-tx", x2000_i2s1_data_tx, 2),
3072+
INGENIC_PIN_GROUP("i2s1-data-rx", x2000_i2s1_data_rx, 2),
3073+
INGENIC_PIN_GROUP("i2s1-clk-tx", x2000_i2s1_clk_tx, 2),
3074+
INGENIC_PIN_GROUP("i2s1-clk-rx", x2000_i2s1_clk_rx, 2),
3075+
INGENIC_PIN_GROUP("i2s1-sysclk-tx", x2000_i2s1_sysclk_tx, 2),
3076+
INGENIC_PIN_GROUP("i2s1-sysclk-rx", x2000_i2s1_sysclk_rx, 2),
3077+
INGENIC_PIN_GROUP("i2s2-data-rx0", x2000_i2s2_data_rx0, 2),
3078+
INGENIC_PIN_GROUP("i2s2-data-rx1", x2000_i2s2_data_rx1, 2),
3079+
INGENIC_PIN_GROUP("i2s2-data-rx2", x2000_i2s2_data_rx2, 2),
3080+
INGENIC_PIN_GROUP("i2s2-data-rx3", x2000_i2s2_data_rx3, 2),
3081+
INGENIC_PIN_GROUP("i2s2-clk-rx", x2000_i2s2_clk_rx, 2),
3082+
INGENIC_PIN_GROUP("i2s2-sysclk-rx", x2000_i2s2_sysclk_rx, 2),
3083+
INGENIC_PIN_GROUP("i2s3-data-tx0", x2000_i2s3_data_tx0, 2),
3084+
INGENIC_PIN_GROUP("i2s3-data-tx1", x2000_i2s3_data_tx1, 2),
3085+
INGENIC_PIN_GROUP("i2s3-data-tx2", x2000_i2s3_data_tx2, 2),
3086+
INGENIC_PIN_GROUP("i2s3-data-tx3", x2000_i2s3_data_tx3, 2),
3087+
INGENIC_PIN_GROUP("i2s3-clk-tx", x2000_i2s3_clk_tx, 2),
3088+
INGENIC_PIN_GROUP("i2s3-sysclk-tx", x2000_i2s3_sysclk_tx, 2),
3089+
INGENIC_PIN_GROUP("dmic-if0", x2000_dmic_if0, 0),
3090+
INGENIC_PIN_GROUP("dmic-if1", x2000_dmic_if1, 0),
3091+
INGENIC_PIN_GROUP("dmic-if2", x2000_dmic_if2, 0),
3092+
INGENIC_PIN_GROUP("dmic-if3", x2000_dmic_if3, 0),
3093+
INGENIC_PIN_GROUP_FUNCS("cim-data-8bit", x2000_cim_8bit,
3094+
x2000_cim_8bit_funcs),
3095+
INGENIC_PIN_GROUP("cim-data-12bit", x2000_cim_12bit, 0),
3096+
INGENIC_PIN_GROUP("lcd-tft-8bit", x2000_lcd_tft_8bit, 1),
3097+
INGENIC_PIN_GROUP("lcd-tft-16bit", x2000_lcd_tft_16bit, 1),
3098+
INGENIC_PIN_GROUP("lcd-tft-18bit", x2000_lcd_tft_18bit, 1),
3099+
INGENIC_PIN_GROUP("lcd-tft-24bit", x2000_lcd_tft_24bit, 1),
3100+
INGENIC_PIN_GROUP("lcd-slcd-8bit", x2000_lcd_slcd_8bit, 2),
3101+
INGENIC_PIN_GROUP("lcd-slcd-16bit", x2000_lcd_tft_16bit, 2),
3102+
INGENIC_PIN_GROUP("pwm0-c", x2000_pwm_pwm0_c, 0),
3103+
INGENIC_PIN_GROUP("pwm0-d", x2000_pwm_pwm0_d, 2),
3104+
INGENIC_PIN_GROUP("pwm1-c", x2000_pwm_pwm1_c, 0),
3105+
INGENIC_PIN_GROUP("pwm1-d", x2000_pwm_pwm1_d, 2),
3106+
INGENIC_PIN_GROUP("pwm2-c", x2000_pwm_pwm2_c, 0),
3107+
INGENIC_PIN_GROUP("pwm2-e", x2000_pwm_pwm2_e, 1),
3108+
INGENIC_PIN_GROUP("pwm3-c", x2000_pwm_pwm3_c, 0),
3109+
INGENIC_PIN_GROUP("pwm3-e", x2000_pwm_pwm3_e, 1),
3110+
INGENIC_PIN_GROUP("pwm4-c", x2000_pwm_pwm4_c, 0),
3111+
INGENIC_PIN_GROUP("pwm4-e", x2000_pwm_pwm4_e, 1),
3112+
INGENIC_PIN_GROUP("pwm5-c", x2000_pwm_pwm5_c, 0),
3113+
INGENIC_PIN_GROUP("pwm5-e", x2000_pwm_pwm5_e, 1),
3114+
INGENIC_PIN_GROUP("pwm6-c", x2000_pwm_pwm6_c, 0),
3115+
INGENIC_PIN_GROUP("pwm6-e", x2000_pwm_pwm6_e, 1),
3116+
INGENIC_PIN_GROUP("pwm7-c", x2000_pwm_pwm7_c, 0),
3117+
INGENIC_PIN_GROUP("pwm7-e", x2000_pwm_pwm7_e, 1),
3118+
INGENIC_PIN_GROUP("pwm8", x2000_pwm_pwm8, 0),
3119+
INGENIC_PIN_GROUP("pwm9", x2000_pwm_pwm9, 0),
3120+
INGENIC_PIN_GROUP("pwm10", x2000_pwm_pwm10, 0),
3121+
INGENIC_PIN_GROUP("pwm11", x2000_pwm_pwm11, 0),
3122+
INGENIC_PIN_GROUP("pwm12", x2000_pwm_pwm12, 0),
3123+
INGENIC_PIN_GROUP("pwm13", x2000_pwm_pwm13, 0),
3124+
INGENIC_PIN_GROUP("pwm14", x2000_pwm_pwm14, 0),
3125+
INGENIC_PIN_GROUP("pwm15", x2000_pwm_pwm15, 0),
3126+
INGENIC_PIN_GROUP("mac", x2100_mac, 1),
3127+
};
3128+
3129+
static const char *x2100_mac_groups[] = { "mac", };
3130+
3131+
static const struct function_desc x2100_functions[] = {
3132+
{ "uart0", x2000_uart0_groups, ARRAY_SIZE(x2000_uart0_groups), },
3133+
{ "uart1", x2000_uart1_groups, ARRAY_SIZE(x2000_uart1_groups), },
3134+
{ "uart2", x2000_uart2_groups, ARRAY_SIZE(x2000_uart2_groups), },
3135+
{ "uart3", x2000_uart3_groups, ARRAY_SIZE(x2000_uart3_groups), },
3136+
{ "uart4", x2000_uart4_groups, ARRAY_SIZE(x2000_uart4_groups), },
3137+
{ "uart5", x2000_uart5_groups, ARRAY_SIZE(x2000_uart5_groups), },
3138+
{ "uart6", x2000_uart6_groups, ARRAY_SIZE(x2000_uart6_groups), },
3139+
{ "uart7", x2000_uart7_groups, ARRAY_SIZE(x2000_uart7_groups), },
3140+
{ "uart8", x2000_uart8_groups, ARRAY_SIZE(x2000_uart8_groups), },
3141+
{ "uart9", x2000_uart9_groups, ARRAY_SIZE(x2000_uart9_groups), },
3142+
{ "sfc", x2000_sfc_groups, ARRAY_SIZE(x2000_sfc_groups), },
3143+
{ "ssi0", x2000_ssi0_groups, ARRAY_SIZE(x2000_ssi0_groups), },
3144+
{ "ssi1", x2000_ssi1_groups, ARRAY_SIZE(x2000_ssi1_groups), },
3145+
{ "mmc0", x2000_mmc0_groups, ARRAY_SIZE(x2000_mmc0_groups), },
3146+
{ "mmc1", x2000_mmc1_groups, ARRAY_SIZE(x2000_mmc1_groups), },
3147+
{ "mmc2", x2000_mmc2_groups, ARRAY_SIZE(x2000_mmc2_groups), },
3148+
{ "emc", x2000_emc_groups, ARRAY_SIZE(x2000_emc_groups), },
3149+
{ "emc-cs1", x2000_cs1_groups, ARRAY_SIZE(x2000_cs1_groups), },
3150+
{ "emc-cs2", x2000_cs2_groups, ARRAY_SIZE(x2000_cs2_groups), },
3151+
{ "i2c0", x2000_i2c0_groups, ARRAY_SIZE(x2000_i2c0_groups), },
3152+
{ "i2c1", x2000_i2c1_groups, ARRAY_SIZE(x2000_i2c1_groups), },
3153+
{ "i2c2", x2000_i2c2_groups, ARRAY_SIZE(x2000_i2c2_groups), },
3154+
{ "i2c3", x2000_i2c3_groups, ARRAY_SIZE(x2000_i2c3_groups), },
3155+
{ "i2c4", x2000_i2c4_groups, ARRAY_SIZE(x2000_i2c4_groups), },
3156+
{ "i2c5", x2000_i2c5_groups, ARRAY_SIZE(x2000_i2c5_groups), },
3157+
{ "i2s1", x2000_i2s1_groups, ARRAY_SIZE(x2000_i2s1_groups), },
3158+
{ "i2s2", x2000_i2s2_groups, ARRAY_SIZE(x2000_i2s2_groups), },
3159+
{ "i2s3", x2000_i2s3_groups, ARRAY_SIZE(x2000_i2s3_groups), },
3160+
{ "dmic", x2000_dmic_groups, ARRAY_SIZE(x2000_dmic_groups), },
3161+
{ "cim", x2000_cim_groups, ARRAY_SIZE(x2000_cim_groups), },
3162+
{ "lcd", x2000_lcd_groups, ARRAY_SIZE(x2000_lcd_groups), },
3163+
{ "pwm0", x2000_pwm0_groups, ARRAY_SIZE(x2000_pwm0_groups), },
3164+
{ "pwm1", x2000_pwm1_groups, ARRAY_SIZE(x2000_pwm1_groups), },
3165+
{ "pwm2", x2000_pwm2_groups, ARRAY_SIZE(x2000_pwm2_groups), },
3166+
{ "pwm3", x2000_pwm3_groups, ARRAY_SIZE(x2000_pwm3_groups), },
3167+
{ "pwm4", x2000_pwm4_groups, ARRAY_SIZE(x2000_pwm4_groups), },
3168+
{ "pwm5", x2000_pwm5_groups, ARRAY_SIZE(x2000_pwm5_groups), },
3169+
{ "pwm6", x2000_pwm6_groups, ARRAY_SIZE(x2000_pwm6_groups), },
3170+
{ "pwm7", x2000_pwm7_groups, ARRAY_SIZE(x2000_pwm7_groups), },
3171+
{ "pwm8", x2000_pwm8_groups, ARRAY_SIZE(x2000_pwm8_groups), },
3172+
{ "pwm9", x2000_pwm9_groups, ARRAY_SIZE(x2000_pwm9_groups), },
3173+
{ "pwm10", x2000_pwm10_groups, ARRAY_SIZE(x2000_pwm10_groups), },
3174+
{ "pwm11", x2000_pwm11_groups, ARRAY_SIZE(x2000_pwm11_groups), },
3175+
{ "pwm12", x2000_pwm12_groups, ARRAY_SIZE(x2000_pwm12_groups), },
3176+
{ "pwm13", x2000_pwm13_groups, ARRAY_SIZE(x2000_pwm13_groups), },
3177+
{ "pwm14", x2000_pwm14_groups, ARRAY_SIZE(x2000_pwm14_groups), },
3178+
{ "pwm15", x2000_pwm15_groups, ARRAY_SIZE(x2000_pwm15_groups), },
3179+
{ "mac", x2100_mac_groups, ARRAY_SIZE(x2100_mac_groups), },
3180+
};
3181+
3182+
static const struct ingenic_chip_info x2100_chip_info = {
3183+
.num_chips = 5,
3184+
.reg_offset = 0x100,
3185+
.version = ID_X2100,
3186+
.groups = x2100_groups,
3187+
.num_groups = ARRAY_SIZE(x2100_groups),
3188+
.functions = x2100_functions,
3189+
.num_functions = ARRAY_SIZE(x2100_functions),
3190+
.pull_ups = x2100_pull_ups,
3191+
.pull_downs = x2100_pull_downs,
3192+
};
3193+
29833194
static u32 ingenic_gpio_read_reg(struct ingenic_gpio_chip *jzgc, u8 reg)
29843195
{
29853196
unsigned int val;
@@ -3845,6 +4056,7 @@ static const struct of_device_id ingenic_gpio_of_matches[] __initconst = {
38454056
{ .compatible = "ingenic,x1000-gpio" },
38464057
{ .compatible = "ingenic,x1830-gpio" },
38474058
{ .compatible = "ingenic,x2000-gpio" },
4059+
{ .compatible = "ingenic,x2100-gpio" },
38484060
{},
38494061
};
38504062

@@ -4100,6 +4312,10 @@ static const struct of_device_id ingenic_pinctrl_of_matches[] = {
41004312
.compatible = "ingenic,x2000e-pinctrl",
41014313
.data = IF_ENABLED(CONFIG_MACH_X2000, &x2000_chip_info)
41024314
},
4315+
{
4316+
.compatible = "ingenic,x2100-pinctrl",
4317+
.data = IF_ENABLED(CONFIG_MACH_X2100, &x2100_chip_info)
4318+
},
41034319
{ /* sentinel */ },
41044320
};
41054321

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