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arm64: dts: apple: t8103: Add nodes for integrated USB Type-C ports
Add device nodes and connections to support USB 3.x on the SoC's integrated USB-C ports of M1-based devices. Each Type-C port has an Apple Type-C PHY for USB 2.0, USB 3.x, USB4/Thunderbolt, and DisplayPort, a Synopsys Designware USB 3.x controller, two DART iommu instances and a CD321x USB PD controller. The iMac variant with four USB-C ports has two SoC integrated USB-C ports and two additional USB-C ports driven by an AsMedia PCIe USB controller. The latter ports are not covered by this change. The port labels use Apple's established naming scheme for the ports. Signed-off-by: Hector Martin <marcan@marcan.st> Co-developed-by: Sven Peter <sven@kernel.org> Signed-off-by: Janne Grunau <j@jannau.net> Tested-by: Sven Peter <sven@kernel.org> # M1 mac mini and macbook air Reviewed-by: Sven Peter <sven@kernel.org> Reviewed-by: Neal Gompa <neal@gompa.dev> Link: https://patch.msgid.link/20260109-apple-dt-usb-c-atc-dwc3-v1-1-ce0e92c1a016@jannau.net Signed-off-by: Sven Peter <sven@kernel.org>
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‎arch/arm64/boot/dts/apple/t8103-j274.dts‎

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@@ -29,6 +29,18 @@
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brcm,board-type = "apple,atlantisb";
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};
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/*
33+
* Provide labels for the USB type C ports.
34+
*/
35+
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&typec0 {
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label = "USB-C Back-left";
38+
};
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&typec1 {
41+
label = "USB-C Back-right";
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};
43+
3244
/*
3345
* Force the bus number assignments so that we can declare some of the
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* on-board devices and properties that are populated by the bootloader

‎arch/arm64/boot/dts/apple/t8103-j293.dts‎

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brcm,board-type = "apple,honshu";
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};
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/*
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* Provide labels for the USB type C ports.
51+
*/
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&typec0 {
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label = "USB-C Left-back";
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};
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&typec1 {
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label = "USB-C Left-front";
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};
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&i2c2 {
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status = "okay";
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};

‎arch/arm64/boot/dts/apple/t8103-j313.dts‎

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@@ -41,3 +41,15 @@
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&fpwm1 {
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status = "okay";
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};
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/*
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* Provide labels for the USB type C ports.
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*/
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&typec0 {
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label = "USB-C Left-back";
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};
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&typec1 {
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label = "USB-C Left-front";
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};

‎arch/arm64/boot/dts/apple/t8103-j456.dts‎

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};
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};
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/*
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* Provide labels for the USB type C ports.
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*/
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&typec0 {
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label = "USB-C Back-right";
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};
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&typec1 {
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label = "USB-C Back-right-middle";
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};
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5062
/*
5163
* Force the bus number assignments so that we can declare some of the
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* on-board devices and properties that are populated by the bootloader

‎arch/arm64/boot/dts/apple/t8103-j457.dts‎

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@@ -37,6 +37,18 @@
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brcm,board-type = "apple,santorini";
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};
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/*
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* Provide labels for the USB type C ports.
42+
*/
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&typec0 {
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label = "USB-C Back-right";
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};
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&typec1 {
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label = "USB-C Back-left";
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};
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/*
4153
* Force the bus number assignments so that we can declare some of the
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* on-board devices and properties that are populated by the bootloader

‎arch/arm64/boot/dts/apple/t8103-jxxx.dtsi‎

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@@ -15,6 +15,8 @@
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serial0 = &serial0;
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serial2 = &serial2;
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wifi0 = &wifi0;
18+
atcphy0 = &atcphy0;
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atcphy1 = &atcphy1;
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};
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chosen {
@@ -53,6 +55,29 @@
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interrupt-parent = <&pinctrl_ap>;
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interrupts = <106 IRQ_TYPE_LEVEL_LOW>;
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interrupt-names = "irq";
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typec0: connector {
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compatible = "usb-c-connector";
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power-role = "dual";
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data-role = "dual";
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ports {
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#address-cells = <1>;
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#size-cells = <0>;
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port@0 {
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reg = <0>;
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typec0_connector_hs: endpoint {
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remote-endpoint = <&dwc3_0_hs>;
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};
72+
};
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port@1 {
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reg = <1>;
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typec0_connector_ss: endpoint {
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remote-endpoint = <&atcphy0_typec_lanes>;
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};
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};
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};
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};
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};
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hpm1: usb-pd@3f {
@@ -61,6 +86,115 @@
6186
interrupt-parent = <&pinctrl_ap>;
6287
interrupts = <106 IRQ_TYPE_LEVEL_LOW>;
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interrupt-names = "irq";
89+
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typec1: connector {
91+
compatible = "usb-c-connector";
92+
power-role = "dual";
93+
data-role = "dual";
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ports {
96+
#address-cells = <1>;
97+
#size-cells = <0>;
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port@0 {
99+
reg = <0>;
100+
typec1_connector_hs: endpoint {
101+
remote-endpoint = <&dwc3_1_hs>;
102+
};
103+
};
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port@1 {
105+
reg = <1>;
106+
typec1_connector_ss: endpoint {
107+
remote-endpoint = <&atcphy1_typec_lanes>;
108+
};
109+
};
110+
};
111+
};
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};
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};
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/* USB controllers */
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&dwc3_0 {
117+
ports {
118+
#address-cells = <1>;
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#size-cells = <0>;
120+
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port@0 {
122+
reg = <0>;
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dwc3_0_hs: endpoint {
124+
remote-endpoint = <&typec0_connector_hs>;
125+
};
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};
127+
128+
port@1 {
129+
reg = <1>;
130+
dwc3_0_ss: endpoint {
131+
remote-endpoint = <&atcphy0_usb3>;
132+
};
133+
};
134+
};
135+
};
136+
137+
&dwc3_1 {
138+
ports {
139+
#address-cells = <1>;
140+
#size-cells = <0>;
141+
142+
port@0 {
143+
reg = <0>;
144+
dwc3_1_hs: endpoint {
145+
remote-endpoint = <&typec1_connector_hs>;
146+
};
147+
};
148+
149+
port@1 {
150+
reg = <1>;
151+
dwc3_1_ss: endpoint {
152+
remote-endpoint = <&atcphy1_usb3>;
153+
};
154+
};
155+
};
156+
};
157+
158+
/* Type-C PHYs */
159+
&atcphy0 {
160+
ports {
161+
#address-cells = <1>;
162+
#size-cells = <0>;
163+
164+
port@0 {
165+
reg = <0>;
166+
atcphy0_typec_lanes: endpoint {
167+
remote-endpoint = <&typec0_connector_ss>;
168+
};
169+
};
170+
171+
port@1 {
172+
reg = <1>;
173+
atcphy0_usb3: endpoint {
174+
remote-endpoint = <&dwc3_0_ss>;
175+
};
176+
};
177+
};
178+
};
179+
180+
&atcphy1 {
181+
ports {
182+
#address-cells = <1>;
183+
#size-cells = <0>;
184+
185+
port@0 {
186+
reg = <0>;
187+
atcphy1_typec_lanes: endpoint {
188+
remote-endpoint = <&typec1_connector_ss>;
189+
};
190+
};
191+
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port@1 {
193+
reg = <1>;
194+
atcphy1_usb3: endpoint {
195+
remote-endpoint = <&dwc3_1_ss>;
196+
};
197+
};
64198
};
65199
};
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‎arch/arm64/boot/dts/apple/t8103.dtsi‎

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#include <dt-bindings/interrupt-controller/irq.h>
1313
#include <dt-bindings/pinctrl/apple.h>
1414
#include <dt-bindings/spmi/spmi.h>
15+
#include <dt-bindings/phy/phy.h>
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1617
/ {
1718
compatible = "apple,t8103", "apple,arm-platform";
@@ -1007,6 +1008,110 @@
10071008
resets = <&ps_ans2>;
10081009
};
10091010

1011+
dwc3_0: usb@382280000 {
1012+
compatible = "apple,t8103-dwc3";
1013+
reg = <0x3 0x82280000 0x0 0xcd00>, <0x3 0x8228cd00 0x0 0x3200>;
1014+
reg-names = "dwc3-core", "dwc3-apple";
1015+
interrupt-parent = <&aic>;
1016+
interrupts = <AIC_IRQ 777 IRQ_TYPE_LEVEL_HIGH>;
1017+
dr_mode = "otg";
1018+
usb-role-switch;
1019+
role-switch-default-mode = "host";
1020+
iommus = <&dwc3_0_dart_0 0>, <&dwc3_0_dart_1 1>;
1021+
power-domains = <&ps_atc0_usb>;
1022+
resets = <&atcphy0>;
1023+
phys = <&atcphy0 PHY_TYPE_USB2>, <&atcphy0 PHY_TYPE_USB3>;
1024+
phy-names = "usb2-phy", "usb3-phy";
1025+
};
1026+
1027+
dwc3_0_dart_0: iommu@382f00000 {
1028+
compatible = "apple,t8103-dart";
1029+
reg = <0x3 0x82f00000 0x0 0x4000>;
1030+
interrupt-parent = <&aic>;
1031+
interrupts = <AIC_IRQ 781 IRQ_TYPE_LEVEL_HIGH>;
1032+
#iommu-cells = <1>;
1033+
power-domains = <&ps_atc0_usb>;
1034+
};
1035+
1036+
dwc3_0_dart_1: iommu@382f80000 {
1037+
compatible = "apple,t8103-dart";
1038+
reg = <0x3 0x82f80000 0x0 0x4000>;
1039+
interrupt-parent = <&aic>;
1040+
interrupts = <AIC_IRQ 781 IRQ_TYPE_LEVEL_HIGH>;
1041+
#iommu-cells = <1>;
1042+
power-domains = <&ps_atc0_usb>;
1043+
};
1044+
1045+
atcphy0: phy@383000000 {
1046+
compatible = "apple,t8103-atcphy";
1047+
reg = <0x3 0x83000000 0x0 0x4c000>,
1048+
<0x3 0x83050000 0x0 0x8000>,
1049+
<0x3 0x80000000 0x0 0x4000>,
1050+
<0x3 0x82a90000 0x0 0x4000>,
1051+
<0x3 0x82a84000 0x0 0x4000>;
1052+
reg-names = "core", "lpdptx", "axi2af", "usb2phy",
1053+
"pipehandler";
1054+
1055+
#phy-cells = <1>;
1056+
#reset-cells = <0>;
1057+
1058+
orientation-switch;
1059+
mode-switch;
1060+
power-domains = <&ps_atc0_usb>;
1061+
};
1062+
1063+
dwc3_1: usb@502280000 {
1064+
compatible = "apple,t8103-dwc3";
1065+
reg = <0x5 0x02280000 0x0 0xcd00>, <0x5 0x0228cd00 0x0 0x3200>;
1066+
reg-names = "dwc3-core", "dwc3-apple";
1067+
interrupt-parent = <&aic>;
1068+
interrupts = <AIC_IRQ 857 IRQ_TYPE_LEVEL_HIGH>;
1069+
dr_mode = "otg";
1070+
usb-role-switch;
1071+
role-switch-default-mode = "host";
1072+
iommus = <&dwc3_1_dart_0 0>, <&dwc3_1_dart_1 1>;
1073+
power-domains = <&ps_atc1_usb>;
1074+
resets = <&atcphy1>;
1075+
phys = <&atcphy1 PHY_TYPE_USB2>, <&atcphy1 PHY_TYPE_USB3>;
1076+
phy-names = "usb2-phy", "usb3-phy";
1077+
};
1078+
1079+
dwc3_1_dart_0: iommu@502f00000 {
1080+
compatible = "apple,t8103-dart";
1081+
reg = <0x5 0x02f00000 0x0 0x4000>;
1082+
interrupt-parent = <&aic>;
1083+
interrupts = <AIC_IRQ 861 IRQ_TYPE_LEVEL_HIGH>;
1084+
#iommu-cells = <1>;
1085+
power-domains = <&ps_atc1_usb>;
1086+
};
1087+
1088+
dwc3_1_dart_1: iommu@502f80000 {
1089+
compatible = "apple,t8103-dart";
1090+
reg = <0x5 0x02f80000 0x0 0x4000>;
1091+
interrupt-parent = <&aic>;
1092+
interrupts = <AIC_IRQ 861 IRQ_TYPE_LEVEL_HIGH>;
1093+
#iommu-cells = <1>;
1094+
power-domains = <&ps_atc1_usb>;
1095+
};
1096+
1097+
atcphy1: phy@503000000 {
1098+
compatible = "apple,t8103-atcphy";
1099+
reg = <0x5 0x03000000 0x0 0x4c000>,
1100+
<0x5 0x03050000 0x0 0x8000>,
1101+
<0x5 0x0 0x0 0x4000>,
1102+
<0x5 0x02a90000 0x0 0x4000>,
1103+
<0x5 0x02a84000 0x0 0x4000>;
1104+
reg-names = "core", "lpdptx", "axi2af", "usb2phy",
1105+
"pipehandler";
1106+
1107+
#phy-cells = <1>;
1108+
#reset-cells = <0>;
1109+
1110+
orientation-switch;
1111+
mode-switch;
1112+
power-domains = <&ps_atc1_usb>;
1113+
};
1114+
10101115
pcie0_dart_0: iommu@681008000 {
10111116
compatible = "apple,t8103-dart";
10121117
reg = <0x6 0x81008000 0x0 0x4000>;

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