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dlech
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iio: adc: ad4695: add 2nd regmap for 16-bit registers
The AD4695 and similar chips have some multibyte registers that have to be read/written in a single operation. So we need to add a 2nd regmap for these registers. These registers are removed from the 8-bit regmap allowable ranges and AD4695_MAX_REG is dropped since it would be ambiguous now. debugfs register access is also updated to automatically use the correct regmap depending on the register address. Signed-off-by: David Lechner <dlechner@baylibre.com> Link: https://patch.msgid.link/20240820-ad4695-gain-offset-v1-1-c8f6e3b47551@baylibre.com Signed-off-by: Jonathan Cameron <Jonathan.Cameron@huawei.com>
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1 file changed

Lines changed: 68 additions & 15 deletions

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‎drivers/iio/adc/ad4695.c‎

Lines changed: 68 additions & 15 deletions
Original file line numberDiff line numberDiff line change
@@ -34,6 +34,7 @@
3434
/* AD4695 registers */
3535
#define AD4695_REG_SPI_CONFIG_A 0x0000
3636
#define AD4695_REG_SPI_CONFIG_A_SW_RST (BIT(7) | BIT(0))
37+
#define AD4695_REG_SPI_CONFIG_A_ADDR_DIR BIT(5)
3738
#define AD4695_REG_SPI_CONFIG_B 0x0001
3839
#define AD4695_REG_SPI_CONFIG_B_INST_MODE BIT(7)
3940
#define AD4695_REG_DEVICE_TYPE 0x0003
@@ -77,7 +78,6 @@
7778
#define AD4695_REG_GAIN_IN(n) (0x00C0 | (2 * (n)))
7879
#define AD4695_REG_AS_SLOT(n) (0x0100 | (n))
7980
#define AD4695_REG_AS_SLOT_INX GENMASK(3, 0)
80-
#define AD4695_MAX_REG 0x017F
8181

8282
/* Conversion mode commands */
8383
#define AD4695_CMD_EXIT_CNV_MODE 0x0A
@@ -121,6 +121,7 @@ struct ad4695_channel_config {
121121
struct ad4695_state {
122122
struct spi_device *spi;
123123
struct regmap *regmap;
124+
struct regmap *regmap16;
124125
struct gpio_desc *reset_gpio;
125126
/* voltages channels plus temperature and timestamp */
126127
struct iio_chan_spec iio_chan[AD4695_MAX_CHANNELS + 2];
@@ -150,8 +151,10 @@ static const struct regmap_range ad4695_regmap_rd_ranges[] = {
150151
regmap_reg_range(AD4695_REG_SPI_CONFIG_C, AD4695_REG_SPI_STATUS),
151152
regmap_reg_range(AD4695_REG_STATUS, AD4695_REG_ALERT_STATUS2),
152153
regmap_reg_range(AD4695_REG_CLAMP_STATUS, AD4695_REG_CLAMP_STATUS),
153-
regmap_reg_range(AD4695_REG_SETUP, AD4695_REG_TEMP_CTRL),
154-
regmap_reg_range(AD4695_REG_CONFIG_IN(0), AD4695_MAX_REG),
154+
regmap_reg_range(AD4695_REG_SETUP, AD4695_REG_AC_CTRL),
155+
regmap_reg_range(AD4695_REG_GPIO_CTRL, AD4695_REG_TEMP_CTRL),
156+
regmap_reg_range(AD4695_REG_CONFIG_IN(0), AD4695_REG_CONFIG_IN(15)),
157+
regmap_reg_range(AD4695_REG_AS_SLOT(0), AD4695_REG_AS_SLOT(127)),
155158
};
156159

157160
static const struct regmap_access_table ad4695_regmap_rd_table = {
@@ -164,8 +167,10 @@ static const struct regmap_range ad4695_regmap_wr_ranges[] = {
164167
regmap_reg_range(AD4695_REG_SCRATCH_PAD, AD4695_REG_SCRATCH_PAD),
165168
regmap_reg_range(AD4695_REG_LOOP_MODE, AD4695_REG_LOOP_MODE),
166169
regmap_reg_range(AD4695_REG_SPI_CONFIG_C, AD4695_REG_SPI_STATUS),
167-
regmap_reg_range(AD4695_REG_SETUP, AD4695_REG_TEMP_CTRL),
168-
regmap_reg_range(AD4695_REG_CONFIG_IN(0), AD4695_MAX_REG),
170+
regmap_reg_range(AD4695_REG_SETUP, AD4695_REG_AC_CTRL),
171+
regmap_reg_range(AD4695_REG_GPIO_CTRL, AD4695_REG_TEMP_CTRL),
172+
regmap_reg_range(AD4695_REG_CONFIG_IN(0), AD4695_REG_CONFIG_IN(15)),
173+
regmap_reg_range(AD4695_REG_AS_SLOT(0), AD4695_REG_AS_SLOT(127)),
169174
};
170175

171176
static const struct regmap_access_table ad4695_regmap_wr_table = {
@@ -174,15 +179,47 @@ static const struct regmap_access_table ad4695_regmap_wr_table = {
174179
};
175180

176181
static const struct regmap_config ad4695_regmap_config = {
177-
.name = "ad4695",
182+
.name = "ad4695-8",
178183
.reg_bits = 16,
179184
.val_bits = 8,
180-
.max_register = AD4695_MAX_REG,
185+
.max_register = AD4695_REG_AS_SLOT(127),
181186
.rd_table = &ad4695_regmap_rd_table,
182187
.wr_table = &ad4695_regmap_wr_table,
183188
.can_multi_write = true,
184189
};
185190

191+
static const struct regmap_range ad4695_regmap16_rd_ranges[] = {
192+
regmap_reg_range(AD4695_REG_STD_SEQ_CONFIG, AD4695_REG_STD_SEQ_CONFIG),
193+
regmap_reg_range(AD4695_REG_UPPER_IN(0), AD4695_REG_GAIN_IN(15)),
194+
};
195+
196+
static const struct regmap_access_table ad4695_regmap16_rd_table = {
197+
.yes_ranges = ad4695_regmap16_rd_ranges,
198+
.n_yes_ranges = ARRAY_SIZE(ad4695_regmap16_rd_ranges),
199+
};
200+
201+
static const struct regmap_range ad4695_regmap16_wr_ranges[] = {
202+
regmap_reg_range(AD4695_REG_STD_SEQ_CONFIG, AD4695_REG_STD_SEQ_CONFIG),
203+
regmap_reg_range(AD4695_REG_UPPER_IN(0), AD4695_REG_GAIN_IN(15)),
204+
};
205+
206+
static const struct regmap_access_table ad4695_regmap16_wr_table = {
207+
.yes_ranges = ad4695_regmap16_wr_ranges,
208+
.n_yes_ranges = ARRAY_SIZE(ad4695_regmap16_wr_ranges),
209+
};
210+
211+
static const struct regmap_config ad4695_regmap16_config = {
212+
.name = "ad4695-16",
213+
.reg_bits = 16,
214+
.reg_stride = 2,
215+
.val_bits = 16,
216+
.val_format_endian = REGMAP_ENDIAN_LITTLE,
217+
.max_register = AD4695_REG_GAIN_IN(15),
218+
.rd_table = &ad4695_regmap16_rd_table,
219+
.wr_table = &ad4695_regmap16_wr_table,
220+
.can_multi_write = true,
221+
};
222+
186223
static const struct iio_chan_spec ad4695_channel_template = {
187224
.type = IIO_VOLTAGE,
188225
.indexed = 1,
@@ -646,13 +683,24 @@ static int ad4695_debugfs_reg_access(struct iio_dev *indio_dev,
646683
struct ad4695_state *st = iio_priv(indio_dev);
647684

648685
iio_device_claim_direct_scoped(return -EBUSY, indio_dev) {
649-
if (readval)
650-
return regmap_read(st->regmap, reg, readval);
651-
652-
return regmap_write(st->regmap, reg, writeval);
686+
if (readval) {
687+
if (regmap_check_range_table(st->regmap, reg,
688+
&ad4695_regmap_rd_table))
689+
return regmap_read(st->regmap, reg, readval);
690+
if (regmap_check_range_table(st->regmap16, reg,
691+
&ad4695_regmap16_rd_table))
692+
return regmap_read(st->regmap16, reg, readval);
693+
} else {
694+
if (regmap_check_range_table(st->regmap, reg,
695+
&ad4695_regmap_wr_table))
696+
return regmap_write(st->regmap, reg, writeval);
697+
if (regmap_check_range_table(st->regmap16, reg,
698+
&ad4695_regmap16_wr_table))
699+
return regmap_write(st->regmap16, reg, writeval);
700+
}
653701
}
654702

655-
unreachable();
703+
return -EINVAL;
656704
}
657705

658706
static const struct iio_info ad4695_info = {
@@ -807,6 +855,11 @@ static int ad4695_probe(struct spi_device *spi)
807855
return dev_err_probe(dev, PTR_ERR(st->regmap),
808856
"Failed to initialize regmap\n");
809857

858+
st->regmap16 = devm_regmap_init_spi(spi, &ad4695_regmap16_config);
859+
if (IS_ERR(st->regmap16))
860+
return dev_err_probe(dev, PTR_ERR(st->regmap16),
861+
"Failed to initialize regmap16\n");
862+
810863
ret = devm_regulator_bulk_get_enable(dev,
811864
ARRAY_SIZE(ad4695_power_supplies),
812865
ad4695_power_supplies);
@@ -876,9 +929,9 @@ static int ad4695_probe(struct spi_device *spi)
876929
msleep(AD4695_T_WAKEUP_SW_MS);
877930
}
878931

879-
/* Needed for debugfs since it only access registers 1 byte at a time. */
880-
ret = regmap_set_bits(st->regmap, AD4695_REG_SPI_CONFIG_C,
881-
AD4695_REG_SPI_CONFIG_C_MB_STRICT);
932+
/* Needed for regmap16 to be able to work correctly. */
933+
ret = regmap_set_bits(st->regmap, AD4695_REG_SPI_CONFIG_A,
934+
AD4695_REG_SPI_CONFIG_A_ADDR_DIR);
882935
if (ret)
883936
return ret;
884937

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