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soc: qcom: llcc-qcom: Add support for SM8750
Add system cache table and configs for SM8750 SoCs. Signed-off-by: Melody Olvera <melody.olvera@oss.qualcomm.com> Reviewed-by: Konrad Dybcio <konrad.dybcio@oss.qualcomm.com> Link: https://lore.kernel.org/r/20250512-sm8750_llcc_master-v5-3-d78dca6282a5@oss.qualcomm.com Signed-off-by: Bjorn Andersson <andersson@kernel.org>
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‎drivers/soc/qcom/llcc-qcom.c‎

Lines changed: 273 additions & 0 deletions
Original file line numberDiff line numberDiff line change
@@ -2689,6 +2689,263 @@ static const struct llcc_slice_config sm8650_data[] = {
26892689
},
26902690
};
26912691

2692+
static const struct llcc_slice_config sm8750_data[] = {
2693+
{
2694+
.usecase_id = LLCC_CPUSS,
2695+
.slice_id = 1,
2696+
.max_cap = 5120,
2697+
.priority = 1,
2698+
.bonus_ways = 0xffffffff,
2699+
.activate_on_init = true,
2700+
.write_scid_en = true,
2701+
}, {
2702+
.usecase_id = LLCC_MDMHPFX,
2703+
.slice_id = 24,
2704+
.max_cap = 1024,
2705+
.priority = 5,
2706+
.fixed_size = true,
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.bonus_ways = 0xffffffff,
2708+
}, {
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.usecase_id = LLCC_VIDSC0,
2710+
.slice_id = 2,
2711+
.max_cap = 512,
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.priority = 4,
2713+
.fixed_size = true,
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.bonus_ways = 0xffffffff,
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}, {
2716+
.usecase_id = LLCC_AUDIO,
2717+
.slice_id = 35,
2718+
.max_cap = 512,
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.priority = 1,
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.fixed_size = true,
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.bonus_ways = 0xffffffff,
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}, {
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.usecase_id = LLCC_MDMHPGRW,
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.slice_id = 25,
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.max_cap = 1024,
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.priority = 5,
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.bonus_ways = 0xffffffff,
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}, {
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.usecase_id = LLCC_MODHW,
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.slice_id = 26,
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.max_cap = 1024,
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.priority = 1,
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.fixed_size = true,
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.bonus_ways = 0xffffffff,
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}, {
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.usecase_id = LLCC_CMPT,
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.slice_id = 34,
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.max_cap = 4096,
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.priority = 1,
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.fixed_size = true,
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.bonus_ways = 0xffffffff,
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}, {
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.usecase_id = LLCC_GPUHTW,
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.slice_id = 11,
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.max_cap = 512,
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.priority = 1,
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.fixed_size = true,
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.bonus_ways = 0xffffffff,
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}, {
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.usecase_id = LLCC_GPU,
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.slice_id = 9,
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.max_cap = 5632,
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.priority = 1,
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.fixed_size = true,
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.bonus_ways = 0xffffffff,
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.write_scid_en = true,
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.write_scid_cacheable_en = true
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}, {
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.usecase_id = LLCC_MMUHWT,
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.slice_id = 18,
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.max_cap = 768,
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.priority = 1,
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.fixed_size = true,
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.bonus_ways = 0xffffffff,
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.activate_on_init = true,
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}, {
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.usecase_id = LLCC_DISP,
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.slice_id = 16,
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.max_cap = 7168,
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.priority = 1,
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.fixed_size = true,
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.bonus_ways = 0xffffffff,
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.cache_mode = 2,
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.stale_en = true,
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}, {
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.usecase_id = LLCC_VIDFW,
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.slice_id = 17,
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.priority = 4,
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.fixed_size = true,
2780+
.bonus_ways = 0xffffffff,
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}, {
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.usecase_id = LLCC_CAMFW,
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.slice_id = 20,
2784+
.priority = 4,
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.fixed_size = true,
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.bonus_ways = 0xffffffff,
2787+
}, {
2788+
.usecase_id = LLCC_MDMPNG,
2789+
.slice_id = 27,
2790+
.max_cap = 256,
2791+
.priority = 5,
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.fixed_size = true,
2793+
.bonus_ways = 0xf0000000,
2794+
}, {
2795+
.usecase_id = LLCC_AUDHW,
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.slice_id = 22,
2797+
.max_cap = 512,
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.priority = 1,
2799+
.fixed_size = true,
2800+
.bonus_ways = 0xffffffff,
2801+
}, {
2802+
.usecase_id = LLCC_CVP,
2803+
.slice_id = 8,
2804+
.max_cap = 800,
2805+
.priority = 5,
2806+
.fixed_size = true,
2807+
.bonus_ways = 0xffffffff,
2808+
.vict_prio = true,
2809+
}, {
2810+
.usecase_id = LLCC_MODPE,
2811+
.slice_id = 29,
2812+
.max_cap = 256,
2813+
.priority = 1,
2814+
.fixed_size = true,
2815+
.bonus_ways = 0xf0000000,
2816+
.alloc_oneway_en = true,
2817+
}, {
2818+
.usecase_id = LLCC_WRCACHE,
2819+
.slice_id = 31,
2820+
.max_cap = 512,
2821+
.priority = 1,
2822+
.fixed_size = true,
2823+
.bonus_ways = 0xffffffff,
2824+
.activate_on_init = true,
2825+
}, {
2826+
.usecase_id = LLCC_CVPFW,
2827+
.slice_id = 19,
2828+
.max_cap = 64,
2829+
.priority = 4,
2830+
.fixed_size = true,
2831+
.bonus_ways = 0xffffffff,
2832+
}, {
2833+
.usecase_id = LLCC_CMPTHCP,
2834+
.slice_id = 15,
2835+
.max_cap = 256,
2836+
.priority = 4,
2837+
.fixed_size = true,
2838+
.bonus_ways = 0xffffffff,
2839+
}, {
2840+
.usecase_id = LLCC_LCPDARE,
2841+
.slice_id = 30,
2842+
.max_cap = 128,
2843+
.priority = 5,
2844+
.fixed_size = true,
2845+
.bonus_ways = 0xffffffff,
2846+
.activate_on_init = true,
2847+
.alloc_oneway_en = true,
2848+
}, {
2849+
.usecase_id = LLCC_AENPU,
2850+
.slice_id = 3,
2851+
.max_cap = 3072,
2852+
.priority = 1,
2853+
.fixed_size = true,
2854+
.bonus_ways = 0xffffffff,
2855+
.cache_mode = 2,
2856+
}, {
2857+
.usecase_id = LLCC_ISLAND1,
2858+
.slice_id = 12,
2859+
.max_cap = 7936,
2860+
.priority = 7,
2861+
.fixed_size = true,
2862+
.bonus_ways = 0x7fffffff,
2863+
}, {
2864+
.usecase_id = LLCC_DISP_WB,
2865+
.slice_id = 23,
2866+
.max_cap = 512,
2867+
.priority = 4,
2868+
.fixed_size = true,
2869+
.bonus_ways = 0xffffffff,
2870+
}, {
2871+
.usecase_id = LLCC_VIDVSP,
2872+
.slice_id = 4,
2873+
.max_cap = 256,
2874+
.priority = 4,
2875+
.fixed_size = true,
2876+
.bonus_ways = 0xffffffff,
2877+
}, {
2878+
.usecase_id = LLCC_VIDDEC,
2879+
.slice_id = 5,
2880+
.max_cap = 6144,
2881+
.priority = 4,
2882+
.fixed_size = true,
2883+
.bonus_ways = 0xffffffff,
2884+
.cache_mode = 2,
2885+
.ovcap_prio = true,
2886+
.parent_slice_id = 33,
2887+
}, {
2888+
.usecase_id = LLCC_CAMOFE,
2889+
.slice_id = 33,
2890+
.max_cap = 6144,
2891+
.priority = 4,
2892+
.fixed_size = true,
2893+
.bonus_ways = 0xffffffff,
2894+
.stale_en = true,
2895+
.ovcap_prio = true,
2896+
.parent_slice_id = 33,
2897+
}, {
2898+
.usecase_id = LLCC_CAMRTIP,
2899+
.slice_id = 13,
2900+
.max_cap = 1024,
2901+
.priority = 4,
2902+
.fixed_size = true,
2903+
.bonus_ways = 0xffffffff,
2904+
.stale_en = true,
2905+
.ovcap_prio = true,
2906+
.parent_slice_id = 33,
2907+
}, {
2908+
.usecase_id = LLCC_CAMSRTIP,
2909+
.slice_id = 14,
2910+
.max_cap = 6144,
2911+
.priority = 4,
2912+
.fixed_size = true,
2913+
.bonus_ways = 0xffffffff,
2914+
.stale_en = true,
2915+
.ovcap_prio = true,
2916+
.parent_slice_id = 33,
2917+
}, {
2918+
.usecase_id = LLCC_CAMRTRF,
2919+
.slice_id = 7,
2920+
.max_cap = 3584,
2921+
.priority = 1,
2922+
.fixed_size = true,
2923+
.bonus_ways = 0xffffffff,
2924+
.stale_en = true,
2925+
.ovcap_prio = true,
2926+
.parent_slice_id = 33,
2927+
}, {
2928+
.usecase_id = LLCC_CAMSRTRF,
2929+
.slice_id = 21,
2930+
.max_cap = 6144,
2931+
.priority = 1,
2932+
.fixed_size = true,
2933+
.bonus_ways = 0xffffffff,
2934+
.stale_en = true,
2935+
.ovcap_prio = true,
2936+
.parent_slice_id = 33,
2937+
}, {
2938+
.usecase_id = LLCC_CPUSSMPAM,
2939+
.slice_id = 6,
2940+
.max_cap = 2048,
2941+
.priority = 1,
2942+
.fixed_size = true,
2943+
.bonus_ways = 0xffffffff,
2944+
.activate_on_init = true,
2945+
.write_scid_en = true,
2946+
},
2947+
};
2948+
26922949
static const struct llcc_slice_config qcs615_data[] = {
26932950
{
26942951
.usecase_id = LLCC_CPUSS,
@@ -3454,6 +3711,16 @@ static const struct qcom_llcc_config sm8650_cfg[] = {
34543711
},
34553712
};
34563713

3714+
static const struct qcom_llcc_config sm8750_cfg[] = {
3715+
{
3716+
.sct_data = sm8750_data,
3717+
.size = ARRAY_SIZE(sm8750_data),
3718+
.skip_llcc_cfg = false,
3719+
.reg_offset = llcc_v6_reg_offset,
3720+
.edac_reg_offset = &llcc_v6_edac_reg_offset,
3721+
},
3722+
};
3723+
34573724
static const struct qcom_llcc_config x1e80100_cfg[] = {
34583725
{
34593726
.sct_data = x1e80100_data,
@@ -3564,6 +3831,11 @@ static const struct qcom_sct_config sm8650_cfgs = {
35643831
.num_config = ARRAY_SIZE(sm8650_cfg),
35653832
};
35663833

3834+
static const struct qcom_sct_config sm8750_cfgs = {
3835+
.llcc_config = sm8750_cfg,
3836+
.num_config = ARRAY_SIZE(sm8750_cfg),
3837+
};
3838+
35673839
static const struct qcom_sct_config x1e80100_cfgs = {
35683840
.llcc_config = x1e80100_cfg,
35693841
.num_config = ARRAY_SIZE(x1e80100_cfg),
@@ -4318,6 +4590,7 @@ static const struct of_device_id qcom_llcc_of_match[] = {
43184590
{ .compatible = "qcom,sm8450-llcc", .data = &sm8450_cfgs },
43194591
{ .compatible = "qcom,sm8550-llcc", .data = &sm8550_cfgs },
43204592
{ .compatible = "qcom,sm8650-llcc", .data = &sm8650_cfgs },
4593+
{ .compatible = "qcom,sm8750-llcc", .data = &sm8750_cfgs },
43214594
{ .compatible = "qcom,x1e80100-llcc", .data = &x1e80100_cfgs },
43224595
{ }
43234596
};

‎include/linux/soc/qcom/llcc-qcom.h‎

Lines changed: 8 additions & 0 deletions
Original file line numberDiff line numberDiff line change
@@ -24,6 +24,7 @@
2424
#define LLCC_CMPTDMA 15
2525
#define LLCC_DISP 16
2626
#define LLCC_VIDFW 17
27+
#define LLCC_CAMFW 18
2728
#define LLCC_MDMHPFX 20
2829
#define LLCC_MDMPNG 21
2930
#define LLCC_AUDHW 22
@@ -67,6 +68,13 @@
6768
#define LLCC_EVCS_LEFT 67
6869
#define LLCC_EVCS_RIGHT 68
6970
#define LLCC_SPAD 69
71+
#define LLCC_VIDDEC 70
72+
#define LLCC_CAMOFE 71
73+
#define LLCC_CAMRTIP 72
74+
#define LLCC_CAMSRTIP 73
75+
#define LLCC_CAMRTRF 74
76+
#define LLCC_CAMSRTRF 75
77+
#define LLCC_CPUSSMPAM 89
7078

7179
/**
7280
* struct llcc_slice_desc - Cache slice descriptor

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