@@ -55,6 +55,29 @@ static struct clk_alpha_pll ipq_pll_huayra = {
5555 },
5656};
5757
58+ static struct clk_alpha_pll ipq_pll_stromer = {
59+ .offset = 0x0 ,
60+ /*
61+ * Reuse CLK_ALPHA_PLL_TYPE_STROMER_PLUS register offsets.
62+ * Although this is a bit confusing, but the offset values
63+ * are correct nevertheless.
64+ */
65+ .regs = ipq_pll_offsets [CLK_ALPHA_PLL_TYPE_STROMER_PLUS ],
66+ .flags = SUPPORTS_DYNAMIC_UPDATE ,
67+ .clkr = {
68+ .enable_reg = 0x0 ,
69+ .enable_mask = BIT (0 ),
70+ .hw .init = & (const struct clk_init_data ) {
71+ .name = "a53pll" ,
72+ .parent_data = & (const struct clk_parent_data ) {
73+ .fw_name = "xo" ,
74+ },
75+ .num_parents = 1 ,
76+ .ops = & clk_alpha_pll_stromer_ops ,
77+ },
78+ },
79+ };
80+
5881static struct clk_alpha_pll ipq_pll_stromer_plus = {
5982 .offset = 0x0 ,
6083 .regs = ipq_pll_offsets [CLK_ALPHA_PLL_TYPE_STROMER_PLUS ],
@@ -144,8 +167,8 @@ struct apss_pll_data {
144167};
145168
146169static const struct apss_pll_data ipq5018_pll_data = {
147- .pll_type = CLK_ALPHA_PLL_TYPE_STROMER_PLUS ,
148- .pll = & ipq_pll_stromer_plus ,
170+ .pll_type = CLK_ALPHA_PLL_TYPE_STROMER ,
171+ .pll = & ipq_pll_stromer ,
149172 .pll_config = & ipq5018_pll_config ,
150173};
151174
@@ -203,7 +226,8 @@ static int apss_ipq_pll_probe(struct platform_device *pdev)
203226
204227 if (data -> pll_type == CLK_ALPHA_PLL_TYPE_HUAYRA )
205228 clk_alpha_pll_configure (data -> pll , regmap , data -> pll_config );
206- else if (data -> pll_type == CLK_ALPHA_PLL_TYPE_STROMER_PLUS )
229+ else if (data -> pll_type == CLK_ALPHA_PLL_TYPE_STROMER ||
230+ data -> pll_type == CLK_ALPHA_PLL_TYPE_STROMER_PLUS )
207231 clk_stromer_pll_configure (data -> pll , regmap , data -> pll_config );
208232
209233 ret = devm_clk_register_regmap (dev , & data -> pll -> clkr );
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