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ndufresnemchehab
ndufresne
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media: h264: Use v4l2_h264_reference for reflist
In preparation for adding field decoding support, convert the byte arrays for reflist into array of struct v4l2_h264_reference. That struct will allow us to mark which field of the reference picture is being referenced. [hverkuil: top_field_order_cnt -> pic_order_count] Signed-off-by: Nicolas Dufresne <nicolas.dufresne@collabora.com> Reviewed-by: Ezequiel Garcia <ezequiel@vanguardiasur.com.ar> Tested-by: Dmitry Osipenko <dmitry.osipenko@collabora.com> Signed-off-by: Hans Verkuil <hverkuil-cisco@xs4all.nl> Signed-off-by: Mauro Carvalho Chehab <mchehab@kernel.org>
1 parent 4d52db4 commit 2e2c3d6

11 files changed

Lines changed: 167 additions & 132 deletions

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‎drivers/media/platform/mediatek/vcodec/vdec/vdec_h264_req_common.c‎

Lines changed: 17 additions & 4 deletions
Original file line numberDiff line numberDiff line change
@@ -12,11 +12,24 @@
1212
#define GET_MTK_VDEC_PARAM(param) \
1313
{ dst_param->param = src_param->param; }
1414

15-
/*
16-
* The firmware expects unused reflist entries to have the value 0x20.
17-
*/
18-
void mtk_vdec_h264_fixup_ref_list(u8 *ref_list, size_t num_valid)
15+
void mtk_vdec_h264_get_ref_list(u8 *ref_list,
16+
const struct v4l2_h264_reference *v4l2_ref_list,
17+
int num_valid)
1918
{
19+
u32 i;
20+
21+
/*
22+
* TODO The firmware does not support field decoding. Future
23+
* implementation must use v4l2_ref_list[i].fields to obtain
24+
* the reference field parity.
25+
*/
26+
27+
for (i = 0; i < num_valid; i++)
28+
ref_list[i] = v4l2_ref_list[i].index;
29+
30+
/*
31+
* The firmware expects unused reflist entries to have the value 0x20.
32+
*/
2033
memset(&ref_list[num_valid], 0x20, 32 - num_valid);
2134
}
2235

‎drivers/media/platform/mediatek/vcodec/vdec/vdec_h264_req_common.h‎

Lines changed: 7 additions & 4 deletions
Original file line numberDiff line numberDiff line change
@@ -164,12 +164,15 @@ struct h264_fb {
164164
};
165165

166166
/**
167-
* mtk_vdec_h264_fixup_ref_list - fixup unused reference to 0x20.
167+
* mtk_vdec_h264_get_ref_list - translate V4L2 reference list
168168
*
169-
* @ref_list: reference picture list
170-
* @num_valid: used reference number
169+
* @ref_list: Mediatek reference picture list
170+
* @v4l2_ref_list: V4L2 reference picture list
171+
* @num_valid: used reference number
171172
*/
172-
void mtk_vdec_h264_fixup_ref_list(u8 *ref_list, size_t num_valid);
173+
void mtk_vdec_h264_get_ref_list(u8 *ref_list,
174+
const struct v4l2_h264_reference *v4l2_ref_list,
175+
int num_valid);
173176

174177
/**
175178
* mtk_vdec_h264_get_ctrl_ptr - get each CID contrl address.

‎drivers/media/platform/mediatek/vcodec/vdec/vdec_h264_req_if.c‎

Lines changed: 10 additions & 5 deletions
Original file line numberDiff line numberDiff line change
@@ -102,6 +102,9 @@ static int get_vdec_decode_parameters(struct vdec_h264_slice_inst *inst)
102102
const struct v4l2_ctrl_h264_scaling_matrix *scaling_matrix;
103103
struct mtk_h264_dec_slice_param *slice_param = &inst->h264_slice_param;
104104
struct v4l2_h264_reflist_builder reflist_builder;
105+
struct v4l2_h264_reference v4l2_p0_reflist[V4L2_H264_REF_LIST_LEN];
106+
struct v4l2_h264_reference v4l2_b0_reflist[V4L2_H264_REF_LIST_LEN];
107+
struct v4l2_h264_reference v4l2_b1_reflist[V4L2_H264_REF_LIST_LEN];
105108
u8 *p0_reflist = slice_param->decode_params.ref_pic_list_p0;
106109
u8 *b0_reflist = slice_param->decode_params.ref_pic_list_b0;
107110
u8 *b1_reflist = slice_param->decode_params.ref_pic_list_b1;
@@ -137,12 +140,14 @@ static int get_vdec_decode_parameters(struct vdec_h264_slice_inst *inst)
137140
/* Build the reference lists */
138141
v4l2_h264_init_reflist_builder(&reflist_builder, dec_params, sps,
139142
inst->dpb);
140-
v4l2_h264_build_p_ref_list(&reflist_builder, p0_reflist);
141-
v4l2_h264_build_b_ref_lists(&reflist_builder, b0_reflist, b1_reflist);
143+
v4l2_h264_build_p_ref_list(&reflist_builder, v4l2_p0_reflist);
144+
v4l2_h264_build_b_ref_lists(&reflist_builder, v4l2_b0_reflist,
145+
v4l2_b1_reflist);
146+
142147
/* Adapt the built lists to the firmware's expectations */
143-
mtk_vdec_h264_fixup_ref_list(p0_reflist, reflist_builder.num_valid);
144-
mtk_vdec_h264_fixup_ref_list(b0_reflist, reflist_builder.num_valid);
145-
mtk_vdec_h264_fixup_ref_list(b1_reflist, reflist_builder.num_valid);
148+
mtk_vdec_h264_get_ref_list(p0_reflist, v4l2_p0_reflist, reflist_builder.num_valid);
149+
mtk_vdec_h264_get_ref_list(b0_reflist, v4l2_b0_reflist, reflist_builder.num_valid);
150+
mtk_vdec_h264_get_ref_list(b1_reflist, v4l2_b1_reflist, reflist_builder.num_valid);
146151

147152
memcpy(&inst->vsi_ctx.h264_slice_params, slice_param,
148153
sizeof(inst->vsi_ctx.h264_slice_params));

‎drivers/media/platform/mediatek/vcodec/vdec/vdec_h264_req_multi_if.c‎

Lines changed: 17 additions & 10 deletions
Original file line numberDiff line numberDiff line change
@@ -222,6 +222,9 @@ static int get_vdec_sig_decode_parameters(struct vdec_h264_slice_inst *inst)
222222
const struct v4l2_ctrl_h264_scaling_matrix *scaling_matrix;
223223
struct vdec_h264_slice_lat_dec_param *slice_param = &inst->h264_slice_param;
224224
struct v4l2_h264_reflist_builder reflist_builder;
225+
struct v4l2_h264_reference v4l2_p0_reflist[V4L2_H264_REF_LIST_LEN];
226+
struct v4l2_h264_reference v4l2_b0_reflist[V4L2_H264_REF_LIST_LEN];
227+
struct v4l2_h264_reference v4l2_b1_reflist[V4L2_H264_REF_LIST_LEN];
225228
u8 *p0_reflist = slice_param->decode_params.ref_pic_list_p0;
226229
u8 *b0_reflist = slice_param->decode_params.ref_pic_list_b0;
227230
u8 *b1_reflist = slice_param->decode_params.ref_pic_list_b1;
@@ -256,13 +259,14 @@ static int get_vdec_sig_decode_parameters(struct vdec_h264_slice_inst *inst)
256259

257260
/* Build the reference lists */
258261
v4l2_h264_init_reflist_builder(&reflist_builder, dec_params, sps, inst->dpb);
259-
v4l2_h264_build_p_ref_list(&reflist_builder, p0_reflist);
262+
v4l2_h264_build_p_ref_list(&reflist_builder, v4l2_p0_reflist);
263+
v4l2_h264_build_b_ref_lists(&reflist_builder, v4l2_b0_reflist, v4l2_b1_reflist);
260264

261-
v4l2_h264_build_b_ref_lists(&reflist_builder, b0_reflist, b1_reflist);
262265
/* Adapt the built lists to the firmware's expectations */
263-
mtk_vdec_h264_fixup_ref_list(p0_reflist, reflist_builder.num_valid);
264-
mtk_vdec_h264_fixup_ref_list(b0_reflist, reflist_builder.num_valid);
265-
mtk_vdec_h264_fixup_ref_list(b1_reflist, reflist_builder.num_valid);
266+
mtk_vdec_h264_get_ref_list(p0_reflist, v4l2_p0_reflist, reflist_builder.num_valid);
267+
mtk_vdec_h264_get_ref_list(b0_reflist, v4l2_b0_reflist, reflist_builder.num_valid);
268+
mtk_vdec_h264_get_ref_list(b1_reflist, v4l2_b1_reflist, reflist_builder.num_valid);
269+
266270
memcpy(&inst->vsi_ctx.h264_slice_params, slice_param,
267271
sizeof(inst->vsi_ctx.h264_slice_params));
268272

@@ -276,6 +280,9 @@ static void vdec_h264_slice_fill_decode_reflist(struct vdec_h264_slice_inst *ins
276280
struct v4l2_ctrl_h264_decode_params *dec_params = &share_info->dec_params;
277281
struct v4l2_ctrl_h264_sps *sps = &share_info->sps;
278282
struct v4l2_h264_reflist_builder reflist_builder;
283+
struct v4l2_h264_reference v4l2_p0_reflist[V4L2_H264_REF_LIST_LEN];
284+
struct v4l2_h264_reference v4l2_b0_reflist[V4L2_H264_REF_LIST_LEN];
285+
struct v4l2_h264_reference v4l2_b1_reflist[V4L2_H264_REF_LIST_LEN];
279286
u8 *p0_reflist = slice_param->decode_params.ref_pic_list_p0;
280287
u8 *b0_reflist = slice_param->decode_params.ref_pic_list_b0;
281288
u8 *b1_reflist = slice_param->decode_params.ref_pic_list_b1;
@@ -291,13 +298,13 @@ static void vdec_h264_slice_fill_decode_reflist(struct vdec_h264_slice_inst *ins
291298
/* Build the reference lists */
292299
v4l2_h264_init_reflist_builder(&reflist_builder, dec_params, sps,
293300
inst->dpb);
294-
v4l2_h264_build_p_ref_list(&reflist_builder, p0_reflist);
295-
v4l2_h264_build_b_ref_lists(&reflist_builder, b0_reflist, b1_reflist);
301+
v4l2_h264_build_p_ref_list(&reflist_builder, v4l2_p0_reflist);
302+
v4l2_h264_build_b_ref_lists(&reflist_builder, v4l2_b0_reflist, v4l2_b1_reflist);
296303

297304
/* Adapt the built lists to the firmware's expectations */
298-
mtk_vdec_h264_fixup_ref_list(p0_reflist, reflist_builder.num_valid);
299-
mtk_vdec_h264_fixup_ref_list(b0_reflist, reflist_builder.num_valid);
300-
mtk_vdec_h264_fixup_ref_list(b1_reflist, reflist_builder.num_valid);
305+
mtk_vdec_h264_get_ref_list(p0_reflist, v4l2_p0_reflist, reflist_builder.num_valid);
306+
mtk_vdec_h264_get_ref_list(b0_reflist, v4l2_b0_reflist, reflist_builder.num_valid);
307+
mtk_vdec_h264_get_ref_list(b1_reflist, v4l2_b1_reflist, reflist_builder.num_valid);
301308
}
302309

303310
static int vdec_h264_slice_alloc_mv_buf(struct vdec_h264_slice_inst *inst,

‎drivers/media/platform/nvidia/tegra-vde/h264.c‎

Lines changed: 12 additions & 7 deletions
Original file line numberDiff line numberDiff line change
@@ -45,9 +45,9 @@ struct tegra_vde_h264_decoder_ctx {
4545
};
4646

4747
struct h264_reflists {
48-
u8 p[V4L2_H264_NUM_DPB_ENTRIES];
49-
u8 b0[V4L2_H264_NUM_DPB_ENTRIES];
50-
u8 b1[V4L2_H264_NUM_DPB_ENTRIES];
48+
struct v4l2_h264_reference p[V4L2_H264_NUM_DPB_ENTRIES];
49+
struct v4l2_h264_reference b0[V4L2_H264_NUM_DPB_ENTRIES];
50+
struct v4l2_h264_reference b1[V4L2_H264_NUM_DPB_ENTRIES];
5151
};
5252

5353
static int tegra_vde_wait_mbe(struct tegra_vde *vde)
@@ -765,10 +765,10 @@ static int tegra_vde_h264_setup_frames(struct tegra_ctx *ctx,
765765
struct tegra_m2m_buffer *tb = vb_to_tegra_buf(&dst->vb2_buf);
766766
struct tegra_ctx_h264 *h = &ctx->h264;
767767
struct v4l2_h264_reflist_builder b;
768+
struct v4l2_h264_reference *dpb_id;
768769
struct h264_reflists reflists;
769770
struct vb2_buffer *ref;
770771
unsigned int i;
771-
u8 *dpb_id;
772772
int err;
773773

774774
/*
@@ -811,14 +811,16 @@ static int tegra_vde_h264_setup_frames(struct tegra_ctx *ctx,
811811
}
812812

813813
for (i = 0; i < b.num_valid; i++) {
814-
ref = get_ref_buf(ctx, dst, dpb_id[i]);
814+
int dpb_idx = dpb_id[i].index;
815815

816-
err = tegra_vde_h264_setup_frame(ctx, h264, &b, ref, dpb_id[i],
816+
ref = get_ref_buf(ctx, dst, dpb_idx);
817+
818+
err = tegra_vde_h264_setup_frame(ctx, h264, &b, ref, dpb_idx,
817819
h264->dpb_frames_nb++);
818820
if (err)
819821
return err;
820822

821-
if (b.refs[dpb_id[i]].pic_order_count < b.cur_pic_order_count)
823+
if (b.refs[dpb_idx].pic_order_count < b.cur_pic_order_count)
822824
h264->dpb_ref_frames_with_earlier_poc_nb++;
823825
}
824826

@@ -880,6 +882,9 @@ static int tegra_vde_h264_setup_context(struct tegra_ctx *ctx,
880882
if (h->pps->flags & V4L2_H264_PPS_FLAG_ENTROPY_CODING_MODE)
881883
return -EOPNOTSUPP;
882884

885+
if (h->decode_params->flags & V4L2_H264_DECODE_PARAM_FLAG_FIELD_PIC)
886+
return -EOPNOTSUPP;
887+
883888
if (h->sps->profile_idc == 66)
884889
h264->baseline_profile = 1;
885890

‎drivers/media/v4l2-core/v4l2-h264.c‎

Lines changed: 17 additions & 16 deletions
Original file line numberDiff line numberDiff line change
@@ -75,12 +75,12 @@ v4l2_h264_init_reflist_builder(struct v4l2_h264_reflist_builder *b,
7575
pic_order_count = dpb[i].top_field_order_cnt;
7676

7777
b->refs[i].pic_order_count = pic_order_count;
78-
b->unordered_reflist[b->num_valid] = i;
78+
b->unordered_reflist[b->num_valid].index = i;
7979
b->num_valid++;
8080
}
8181

8282
for (i = b->num_valid; i < ARRAY_SIZE(b->unordered_reflist); i++)
83-
b->unordered_reflist[i] = i;
83+
b->unordered_reflist[i].index = i;
8484
}
8585
EXPORT_SYMBOL_GPL(v4l2_h264_init_reflist_builder);
8686

@@ -90,8 +90,8 @@ static int v4l2_h264_p_ref_list_cmp(const void *ptra, const void *ptrb,
9090
const struct v4l2_h264_reflist_builder *builder = data;
9191
u8 idxa, idxb;
9292

93-
idxa = *((u8 *)ptra);
94-
idxb = *((u8 *)ptrb);
93+
idxa = ((struct v4l2_h264_reference *)ptra)->index;
94+
idxb = ((struct v4l2_h264_reference *)ptrb)->index;
9595

9696
if (WARN_ON(idxa >= V4L2_H264_NUM_DPB_ENTRIES ||
9797
idxb >= V4L2_H264_NUM_DPB_ENTRIES))
@@ -125,8 +125,8 @@ static int v4l2_h264_b0_ref_list_cmp(const void *ptra, const void *ptrb,
125125
s32 poca, pocb;
126126
u8 idxa, idxb;
127127

128-
idxa = *((u8 *)ptra);
129-
idxb = *((u8 *)ptrb);
128+
idxa = ((struct v4l2_h264_reference *)ptra)->index;
129+
idxb = ((struct v4l2_h264_reference *)ptrb)->index;
130130

131131
if (WARN_ON(idxa >= V4L2_H264_NUM_DPB_ENTRIES ||
132132
idxb >= V4L2_H264_NUM_DPB_ENTRIES))
@@ -170,8 +170,8 @@ static int v4l2_h264_b1_ref_list_cmp(const void *ptra, const void *ptrb,
170170
s32 poca, pocb;
171171
u8 idxa, idxb;
172172

173-
idxa = *((u8 *)ptra);
174-
idxb = *((u8 *)ptrb);
173+
idxa = ((struct v4l2_h264_reference *)ptra)->index;
174+
idxb = ((struct v4l2_h264_reference *)ptrb)->index;
175175

176176
if (WARN_ON(idxa >= V4L2_H264_NUM_DPB_ENTRIES ||
177177
idxb >= V4L2_H264_NUM_DPB_ENTRIES))
@@ -212,8 +212,8 @@ static int v4l2_h264_b1_ref_list_cmp(const void *ptra, const void *ptrb,
212212
* v4l2_h264_build_p_ref_list() - Build the P reference list
213213
*
214214
* @builder: reference list builder context
215-
* @reflist: 16-bytes array used to store the P reference list. Each entry
216-
* is an index in the DPB
215+
* @reflist: 16 sized array used to store the P reference list. Each entry
216+
* is a v4l2_h264_reference structure
217217
*
218218
* This functions builds the P reference lists. This procedure is describe in
219219
* section '8.2.4 Decoding process for reference picture lists construction'
@@ -222,7 +222,7 @@ static int v4l2_h264_b1_ref_list_cmp(const void *ptra, const void *ptrb,
222222
*/
223223
void
224224
v4l2_h264_build_p_ref_list(const struct v4l2_h264_reflist_builder *builder,
225-
u8 *reflist)
225+
struct v4l2_h264_reference *reflist)
226226
{
227227
memcpy(reflist, builder->unordered_reflist,
228228
sizeof(builder->unordered_reflist[0]) * builder->num_valid);
@@ -235,10 +235,10 @@ EXPORT_SYMBOL_GPL(v4l2_h264_build_p_ref_list);
235235
* v4l2_h264_build_b_ref_lists() - Build the B0/B1 reference lists
236236
*
237237
* @builder: reference list builder context
238-
* @b0_reflist: 16-bytes array used to store the B0 reference list. Each entry
239-
* is an index in the DPB
240-
* @b1_reflist: 16-bytes array used to store the B1 reference list. Each entry
241-
* is an index in the DPB
238+
* @b0_reflist: 16 sized array used to store the B0 reference list. Each entry
239+
* is a v4l2_h264_reference structure
240+
* @b1_reflist: 16 sized array used to store the B1 reference list. Each entry
241+
* is a v4l2_h264_reference structure
242242
*
243243
* This functions builds the B0/B1 reference lists. This procedure is described
244244
* in section '8.2.4 Decoding process for reference picture lists construction'
@@ -247,7 +247,8 @@ EXPORT_SYMBOL_GPL(v4l2_h264_build_p_ref_list);
247247
*/
248248
void
249249
v4l2_h264_build_b_ref_lists(const struct v4l2_h264_reflist_builder *builder,
250-
u8 *b0_reflist, u8 *b1_reflist)
250+
struct v4l2_h264_reference *b0_reflist,
251+
struct v4l2_h264_reference *b1_reflist)
251252
{
252253
memcpy(b0_reflist, builder->unordered_reflist,
253254
sizeof(builder->unordered_reflist[0]) * builder->num_valid);

‎drivers/staging/media/hantro/hantro_g1_h264_dec.c‎

Lines changed: 19 additions & 19 deletions
Original file line numberDiff line numberDiff line change
@@ -126,7 +126,7 @@ static void set_params(struct hantro_ctx *ctx, struct vb2_v4l2_buffer *src_buf)
126126

127127
static void set_ref(struct hantro_ctx *ctx)
128128
{
129-
const u8 *b0_reflist, *b1_reflist, *p_reflist;
129+
const struct v4l2_h264_reference *b0_reflist, *b1_reflist, *p_reflist;
130130
struct hantro_dev *vpu = ctx->dev;
131131
int reg_num;
132132
u32 reg;
@@ -157,12 +157,12 @@ static void set_ref(struct hantro_ctx *ctx)
157157
*/
158158
reg_num = 0;
159159
for (i = 0; i < 15; i += 3) {
160-
reg = G1_REG_BD_REF_PIC_BINIT_RLIST_F0(b0_reflist[i]) |
161-
G1_REG_BD_REF_PIC_BINIT_RLIST_F1(b0_reflist[i + 1]) |
162-
G1_REG_BD_REF_PIC_BINIT_RLIST_F2(b0_reflist[i + 2]) |
163-
G1_REG_BD_REF_PIC_BINIT_RLIST_B0(b1_reflist[i]) |
164-
G1_REG_BD_REF_PIC_BINIT_RLIST_B1(b1_reflist[i + 1]) |
165-
G1_REG_BD_REF_PIC_BINIT_RLIST_B2(b1_reflist[i + 2]);
160+
reg = G1_REG_BD_REF_PIC_BINIT_RLIST_F0(b0_reflist[i].index) |
161+
G1_REG_BD_REF_PIC_BINIT_RLIST_F1(b0_reflist[i + 1].index) |
162+
G1_REG_BD_REF_PIC_BINIT_RLIST_F2(b0_reflist[i + 2].index) |
163+
G1_REG_BD_REF_PIC_BINIT_RLIST_B0(b1_reflist[i].index) |
164+
G1_REG_BD_REF_PIC_BINIT_RLIST_B1(b1_reflist[i + 1].index) |
165+
G1_REG_BD_REF_PIC_BINIT_RLIST_B2(b1_reflist[i + 2].index);
166166
vdpu_write_relaxed(vpu, reg, G1_REG_BD_REF_PIC(reg_num++));
167167
}
168168

@@ -171,12 +171,12 @@ static void set_ref(struct hantro_ctx *ctx)
171171
* of forward and backward reference picture lists and first 4 entries
172172
* of P forward picture list.
173173
*/
174-
reg = G1_REG_BD_P_REF_PIC_BINIT_RLIST_F15(b0_reflist[15]) |
175-
G1_REG_BD_P_REF_PIC_BINIT_RLIST_B15(b1_reflist[15]) |
176-
G1_REG_BD_P_REF_PIC_PINIT_RLIST_F0(p_reflist[0]) |
177-
G1_REG_BD_P_REF_PIC_PINIT_RLIST_F1(p_reflist[1]) |
178-
G1_REG_BD_P_REF_PIC_PINIT_RLIST_F2(p_reflist[2]) |
179-
G1_REG_BD_P_REF_PIC_PINIT_RLIST_F3(p_reflist[3]);
174+
reg = G1_REG_BD_P_REF_PIC_BINIT_RLIST_F15(b0_reflist[15].index) |
175+
G1_REG_BD_P_REF_PIC_BINIT_RLIST_B15(b1_reflist[15].index) |
176+
G1_REG_BD_P_REF_PIC_PINIT_RLIST_F0(p_reflist[0].index) |
177+
G1_REG_BD_P_REF_PIC_PINIT_RLIST_F1(p_reflist[1].index) |
178+
G1_REG_BD_P_REF_PIC_PINIT_RLIST_F2(p_reflist[2].index) |
179+
G1_REG_BD_P_REF_PIC_PINIT_RLIST_F3(p_reflist[3].index);
180180
vdpu_write_relaxed(vpu, reg, G1_REG_BD_P_REF_PIC);
181181

182182
/*
@@ -185,12 +185,12 @@ static void set_ref(struct hantro_ctx *ctx)
185185
*/
186186
reg_num = 0;
187187
for (i = 4; i < HANTRO_H264_DPB_SIZE; i += 6) {
188-
reg = G1_REG_FWD_PIC_PINIT_RLIST_F0(p_reflist[i]) |
189-
G1_REG_FWD_PIC_PINIT_RLIST_F1(p_reflist[i + 1]) |
190-
G1_REG_FWD_PIC_PINIT_RLIST_F2(p_reflist[i + 2]) |
191-
G1_REG_FWD_PIC_PINIT_RLIST_F3(p_reflist[i + 3]) |
192-
G1_REG_FWD_PIC_PINIT_RLIST_F4(p_reflist[i + 4]) |
193-
G1_REG_FWD_PIC_PINIT_RLIST_F5(p_reflist[i + 5]);
188+
reg = G1_REG_FWD_PIC_PINIT_RLIST_F0(p_reflist[i].index) |
189+
G1_REG_FWD_PIC_PINIT_RLIST_F1(p_reflist[i + 1].index) |
190+
G1_REG_FWD_PIC_PINIT_RLIST_F2(p_reflist[i + 2].index) |
191+
G1_REG_FWD_PIC_PINIT_RLIST_F3(p_reflist[i + 3].index) |
192+
G1_REG_FWD_PIC_PINIT_RLIST_F4(p_reflist[i + 4].index) |
193+
G1_REG_FWD_PIC_PINIT_RLIST_F5(p_reflist[i + 5].index);
194194
vdpu_write_relaxed(vpu, reg, G1_REG_FWD_PIC(reg_num++));
195195
}
196196

‎drivers/staging/media/hantro/hantro_hw.h‎

Lines changed: 3 additions & 3 deletions
Original file line numberDiff line numberDiff line change
@@ -69,9 +69,9 @@ struct hantro_h264_dec_ctrls {
6969
* @b1: B1 reflist
7070
*/
7171
struct hantro_h264_dec_reflists {
72-
u8 p[HANTRO_H264_DPB_SIZE];
73-
u8 b0[HANTRO_H264_DPB_SIZE];
74-
u8 b1[HANTRO_H264_DPB_SIZE];
72+
struct v4l2_h264_reference p[HANTRO_H264_DPB_SIZE];
73+
struct v4l2_h264_reference b0[HANTRO_H264_DPB_SIZE];
74+
struct v4l2_h264_reference b1[HANTRO_H264_DPB_SIZE];
7575
};
7676

7777
/**

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